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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-02-08 13:48:07 -0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-02-13 16:15:08 +0100 |
| commit | ea55a221bfc04bde7c7874ecd98881e09763a192 (patch) | |
| tree | ea7a678431415aea7fc4c93e9ca335636995095e /include/hw/sd/sdhci.h | |
| parent | 06c5120b094700d21d36eb5db00f7bb60ea65868 (diff) | |
| download | focaccia-qemu-ea55a221bfc04bde7c7874ecd98881e09763a192.tar.gz focaccia-qemu-ea55a221bfc04bde7c7874ecd98881e09763a192.zip | |
sdhci: implement the Host Control 2 register (tuning sequence)
[based on a patch from Alistair Francis <alistair.francis@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-20-f4bug@amsat.org>
Diffstat (limited to 'include/hw/sd/sdhci.h')
| -rw-r--r-- | include/hw/sd/sdhci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 54594845ce..fd606e9928 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -73,6 +73,7 @@ typedef struct SDHCIState { uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */ uint16_t errintsigen; /* Error Interrupt Signal Enable Register */ uint16_t acmd12errsts; /* Auto CMD12 error status register */ + uint16_t hostctl2; /* Host Control 2 */ uint64_t admasysaddr; /* ADMA System Address Register */ /* Read-only registers */ |