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| author | Jinjie Ruan <ruanjinjie@huawei.com> | 2024-04-19 14:33:00 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-04-25 10:21:05 +0100 |
| commit | 83f320753827da6bd381b46b8f3e6736046c86cd (patch) | |
| tree | 7da497c74450c92ca42fdbcd47ce4f6008196041 /include/hw/sparc/sun4u_iommu.h | |
| parent | 167f2631df98c5b1af622a9afe3afe00867ef080 (diff) | |
| download | focaccia-qemu-83f320753827da6bd381b46b8f3e6736046c86cd.tar.gz focaccia-qemu-83f320753827da6bd381b46b8f3e6736046c86cd.zip | |
hw/intc/arm_gicv3: Add external IRQ lines for NMI
Augment the GICv3's QOM device interface by adding one new set of sysbus IRQ line, to signal NMI to each CPU. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-11-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/sparc/sun4u_iommu.h')
0 files changed, 0 insertions, 0 deletions