diff options
| author | LIU Zhiwei <zhiwei_liu@linux.alibaba.com> | 2023-02-13 17:45:50 +0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-02-23 14:21:34 -0800 |
| commit | 8c89d50c10afdd98da82642ca5e9d7af4f1c18bd (patch) | |
| tree | d6e60c77cfb61d090d3a4a72d1b0cf816651fb7b /include/hw/timer/cmsdk-apb-timer.h | |
| parent | 718942aed69d42f0d982824b2469331ff77edcb2 (diff) | |
| download | focaccia-qemu-8c89d50c10afdd98da82642ca5e9d7af4f1c18bd.tar.gz focaccia-qemu-8c89d50c10afdd98da82642ca5e9d7af4f1c18bd.zip | |
target/riscv: Fix vslide1up.vf and vslide1down.vf
vslide1up_##BITWIDTH is used by the vslide1up.vx and vslide1up.vf. So its scalar input should be uint64_t to hold the 64 bits float register.And the same for vslide1down_##BITWIDTH. This bug is caught when run these instructions on qemu-riscv32. Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-ID: <20230213094550.29621-1-zhiwei_liu@linux.alibaba.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/hw/timer/cmsdk-apb-timer.h')
0 files changed, 0 insertions, 0 deletions