diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2016-09-08 15:51:57 +0100 |
|---|---|---|
| committer | Yongbok Kim <yongbok.kim@imgtec.com> | 2017-02-21 23:49:29 +0000 |
| commit | 62be393423eac3d2fcb8313dc441db4e76f44c78 (patch) | |
| tree | c35e06c51b10505a57bf7c809a5c9b39a4f368d1 /include/hw/timer/mips_gictimer.h | |
| parent | 51b58561c1dacdb0ce999ada94912caaed157f83 (diff) | |
| download | focaccia-qemu-62be393423eac3d2fcb8313dc441db4e76f44c78.tar.gz focaccia-qemu-62be393423eac3d2fcb8313dc441db4e76f44c78.zip | |
hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller
Add support for emulating the Xilinx AXI Root Port Bridge for PCI Express as described by Xilinx' PG055 document. This is a PCIe controller that can be used with certain series of Xilinx FPGAs, and is used on the MIPS Boston board which will make use of this code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [yongbok.kim@imgtec.com: removed returning on !level, updated IRQ connection with GPIO logic, moved xilinx_pcie_init() to boston.c replaced stw_le_p() with pci_set_word() and other cosmetic changes] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Diffstat (limited to 'include/hw/timer/mips_gictimer.h')
0 files changed, 0 insertions, 0 deletions