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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-05-09 05:45:56 +0200 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-05-09 05:45:56 +0200 |
| commit | 1a648f7ae4d3ac97ef0855baec46047ea21a400a (patch) | |
| tree | 90174d27f6e9b16482773ed16f598ee9b32fc3fe /include/hw | |
| parent | 4e66a08546a2588a4667766a1edab9caccf24ce3 (diff) | |
| parent | 8b4d80bb53af30db5de91749216d0bb73fa93cab (diff) | |
| download | focaccia-qemu-1a648f7ae4d3ac97ef0855baec46047ea21a400a.tar.gz focaccia-qemu-1a648f7ae4d3ac97ef0855baec46047ea21a400a.zip | |
Merge tag 'hw-misc-20240508' of https://github.com/philmd/qemu into staging
Misc HW patches - Few more g_memdup() replaced by safer g_memdup2() wrapper (Phil) - Endianness access fixed in vfio-user config space (Mattias) - Replace qemu_mutex_lock() -> QEMU_LOCK_GUARD in system/physmem (Phil) - Per-AddressSpace bounce buffering (Mattias) - Allow to compile x86 PC machines without Floppy Controller (Thomas) - Cleanups around i386 "isa-bios" memory regions (Bernhard) - Remove unused usb rndis_config_parameter structure (David) - Migrate missing clock in STM32L4x5 GPIOs (Inès) - Deprecate PPC 'ref405ep' machine and 405 CPUs (Cédric) - Memory leak fixed in Loongarch Virt machine (Song Gao) - hw/loongarch/ code moved around (Paolo & Bibo Mao) - Emulate S3 suspend in loongson3_virt machine (Jiaxun) - Implement IOCSR address space in Loongson IPI (Jiaxun) - Use QEMU header path relative to include/ directory (Phil) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmY7+NgACgkQ4+MsLN6t # wN4QdhAAnPGMoIGubXiZjrEmCuDU117Hm//g3wFdirn6pSr3XFWk+LGHurpgWzwf # 6AG2ERE6ouEqbZmhfnkLA9/3cSuS/6YgCDxfQ/2Z5N7hy5+GaG60paIk2iw4wJc+ # z+3EBBNp1MKP7etP/f7XvBbempOGHSENvH83ZEKTXln6oYe/HQWBoTChV/W6Uczv # Txf45DJ6QPPQl7cBYqtLpg9Nmc4g6d3M5t5YWzkBrecvXiBlKdZnEsI5CBtmXM8D # h7+wIyNMl0Nc3DgQWN1SsARFDUyHG4bE4K6MS2KkGLkfFF84o8rRtEPV0RvsT+g6 # 0VkhZqLf+Gdq2w1IxCt1k5VCx8HK25+zWZypXlXY1o1dbfssqqbvXEh+3sws67eJ # 4Hn+8QIXZBsl/zUxBbw5/CVYTHmy4Aosc1TItvDsCPnlicfV2phKSxADlL/WJCCU # IQBwDMtxNwYM/QMP3bRIN0xNNSpB0+kOzfkRf1hVQmxH+ObqIvvIA+RbI6NhjM3L # qXw5o0+FltLg7kPGk4Fo/rlhfnydRAE/swrwYd3WRp0sKjDe0lV3r7Bu+FZ4imdB # 4u24FJK8ygcQOKiyHEX9cEkKruYAXeFmI3WglimYe5Po2LvIonsRLiqX97CGhgDX # UM9Oo0Sr/0NnV7FnOW75OijNa2PE7pLVgWDjM3Xefmltqui7F/M= # =uOIs # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 May 2024 12:12:40 AM CEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'hw-misc-20240508' of https://github.com/philmd/qemu: (28 commits) misc: Use QEMU header path relative to include/ directory hw/intc/loongson_ipi: Implement IOCSR address space for MIPS hw/intc/loongarch_ipi: Rename as loongson_ipi hw/intc/loongarch_ipi: Remove pointless MAX_CPU check hw/mips/loongson3_virt: Emulate suspend function hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE hw/loongarch/virt: Fix memory leak hw/loongarch: move memory map to boot.c hw/ppc: Deprecate 'ref405ep' machine and 405 CPUs hw/gpio: Handle clock migration in STM32L4x5 gpios hw/usb/dev-network: Remove unused struct 'rndis_config_parameter' hw/i386/x86: Extract x86_isa_bios_init() from x86_bios_rom_init() hw/i386/x86: Don't leak "pc.bios" memory region hw/i386/x86: Don't leak "isa-bios" memory regions hw/i386: Have x86_bios_rom_init() take X86MachineState rather than MachineState hw/i386/x86: Eliminate two if statements in x86_bios_rom_init() hw/i386: Add the possibility to use i440fx and isapc without FDC hw/i386/Kconfig: Allow to compile Q35 without FDC_ISA hw/i386/pc: Allow to compile without CONFIG_FDC_ISA ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/i386/x86.h | 17 | ||||
| -rw-r--r-- | include/hw/intc/loongson_ipi.h (renamed from include/hw/intc/loongarch_ipi.h) | 12 | ||||
| -rw-r--r-- | include/hw/loongarch/boot.h | 10 | ||||
| -rw-r--r-- | include/hw/loongarch/virt.h | 21 |
4 files changed, 37 insertions, 23 deletions
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 4dc30dcb4d..d7b7d3f3ce 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -18,6 +18,7 @@ #define HW_I386_X86_H #include "exec/hwaddr.h" +#include "exec/memory.h" #include "hw/boards.h" #include "hw/intc/ioapic.h" @@ -52,6 +53,18 @@ struct X86MachineState { GMappedFile *initrd_mapped_file; HotplugHandler *acpi_dev; + /* + * Map the whole BIOS just underneath the 4 GiB address boundary. Only used + * in the ROM (-bios) case. + */ + MemoryRegion bios; + + /* + * Map the upper 128 KiB of the BIOS just underneath the 1 MiB address + * boundary. + */ + MemoryRegion isa_bios; + /* RAM information (sizes, addresses, configuration): */ ram_addr_t below_4g_mem_size, above_4g_mem_size; @@ -116,7 +129,9 @@ void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); -void x86_bios_rom_init(MachineState *ms, const char *default_firmware, +void x86_isa_bios_init(MemoryRegion *isa_bios, MemoryRegion *isa_memory, + MemoryRegion *bios, bool read_only); +void x86_bios_rom_init(X86MachineState *x86ms, const char *default_firmware, MemoryRegion *rom_memory, bool isapc_ram_fw); void x86_load_linux(X86MachineState *x86ms, diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongson_ipi.h index 1c1e834849..2c0e8820f5 100644 --- a/include/hw/intc/loongarch_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * LoongArch ipi interrupt header files + * Loongson ipi interrupt header files * * Copyright (C) 2021 Loongson Technology Corporation Limited */ -#ifndef HW_LOONGARCH_IPI_H -#define HW_LOONGARCH_IPI_H +#ifndef HW_LOONGSON_IPI_H +#define HW_LOONGSON_IPI_H #include "hw/sysbus.h" @@ -30,8 +30,8 @@ #define IPI_MBX_NUM 4 -#define TYPE_LOONGARCH_IPI "loongarch_ipi" -OBJECT_DECLARE_SIMPLE_TYPE(LoongArchIPI, LOONGARCH_IPI) +#define TYPE_LOONGSON_IPI "loongson_ipi" +OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPI, LOONGSON_IPI) typedef struct IPICore { uint32_t status; @@ -43,7 +43,7 @@ typedef struct IPICore { qemu_irq irq; } IPICore; -struct LoongArchIPI { +struct LoongsonIPI { SysBusDevice parent_obj; MemoryRegion ipi_iocsr_mem; MemoryRegion ipi64_iocsr_mem; diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h index 4ebcc89dcf..b3b870df1f 100644 --- a/include/hw/loongarch/boot.h +++ b/include/hw/loongarch/boot.h @@ -104,6 +104,16 @@ struct loongarch_boot_info { uint64_t a0, a1, a2; }; +extern struct memmap_entry *memmap_table; +extern unsigned memmap_entries; + +struct memmap_entry { + uint64_t address; + uint64_t length; + uint32_t type; + uint32_t reserved; +}; + void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info); #endif /* HW_LOONGARCH_BOOT_H */ diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index 4e14bf6060..2c4f5cf9c8 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -11,7 +11,7 @@ #include "target/loongarch/cpu.h" #include "hw/boards.h" #include "qemu/queue.h" -#include "hw/intc/loongarch_ipi.h" +#include "hw/intc/loongson_ipi.h" #include "hw/block/flash.h" #include "hw/loongarch/boot.h" @@ -37,17 +37,7 @@ #define FDT_BASE 0x100000 -extern struct memmap_entry *memmap_table; -extern unsigned memmap_entries; - -struct memmap_entry { - uint64_t address; - uint64_t length; - uint32_t type; - uint32_t reserved; -}; - -struct LoongArchMachineState { +struct LoongArchVirtMachineState { /*< private >*/ MachineState parent_obj; @@ -73,8 +63,7 @@ struct LoongArchMachineState { struct loongarch_boot_info bootinfo; }; -#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt") -OBJECT_DECLARE_SIMPLE_TYPE(LoongArchMachineState, LOONGARCH_MACHINE) -bool loongarch_is_acpi_enabled(LoongArchMachineState *lams); -void loongarch_acpi_setup(LoongArchMachineState *lams); +#define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt") +OBJECT_DECLARE_SIMPLE_TYPE(LoongArchVirtMachineState, LOONGARCH_VIRT_MACHINE) +void loongarch_acpi_setup(LoongArchVirtMachineState *lvms); #endif |