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| author | Peter Maydell <peter.maydell@linaro.org> | 2017-10-31 18:09:11 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-10-31 18:09:11 +0000 |
| commit | 47ba789c97c8d201d01058b00a14d8a9a85fcfe9 (patch) | |
| tree | ba3f8522d539ad607057b6305f2bd0d6ea370b39 /include/hw | |
| parent | 7fa00e204902cee0b33a0c60de87e87319d1809f (diff) | |
| parent | badd3d62c619d24a5af62198374f42b7c510ee41 (diff) | |
| download | focaccia-qemu-47ba789c97c8d201d01058b00a14d8a9a85fcfe9.tar.gz focaccia-qemu-47ba789c97c8d201d01058b00a14d8a9a85fcfe9.zip | |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging
qemu-sparc update # gpg: Signature made Tue 31 Oct 2017 17:43:11 GMT # gpg: using RSA key 0x5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-signed: sun4m: change TYPE_SUN4M_IOMMU macro from "iommu" to "sun4m-iommu" sun4m_iommu: remove legacy sparc_iommu_memory_rw() function sparc32_dma: switch over to using IOMMU memory region and DMA API sun4m: implement IOMMU translation using IOMMU memory region sparc32_dma: add len to esp/le DMA memory tracing sparc32_dma: remove is_ledma hack and replace with memory region alias sparc32_dma: introduce new SPARC32_DMA type container object sparc32_dma: make lance device child of ledma device lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h sparc32_dma: make esp device child of espdma device esp: move TYPE_ESP and SysBusESPState from esp.c to esp.h sparc32_dma: use object link instead of qdev property to pass IOMMU reference sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.h sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init() sparc32_dma: move type declarations from sparc32_dma.c to sparc32_dma.h sparc32_dma: split esp and le into separate DMA devices sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
| -rw-r--r-- | include/hw/net/lance.h | 45 | ||||
| -rw-r--r-- | include/hw/scsi/esp.h | 14 | ||||
| -rw-r--r-- | include/hw/sparc/sparc32_dma.h | 55 | ||||
| -rw-r--r-- | include/hw/sparc/sun4m.h | 35 |
4 files changed, 134 insertions, 15 deletions
diff --git a/include/hw/net/lance.h b/include/hw/net/lance.h new file mode 100644 index 0000000000..ffdd35c4d7 --- /dev/null +++ b/include/hw/net/lance.h @@ -0,0 +1,45 @@ +/* + * QEMU Lance (Am7990) device emulation + * + * Copyright (c) 2004 Antony T Curtis + * Copyright (c) 2017 Mark Cave-Ayland + * + * This represents the Sparc32 lance (Am7990) ethernet device which is an + * earlier register-compatible member of the AMD PC-Net II (Am79C970A) family. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef LANCE_H +#define LANCE_H + +#include "net/net.h" +#include "hw/net/pcnet.h" + +#define TYPE_LANCE "lance" +#define SYSBUS_PCNET(obj) \ + OBJECT_CHECK(SysBusPCNetState, (obj), TYPE_LANCE) + +typedef struct { + SysBusDevice parent_obj; + + PCNetState state; +} SysBusPCNetState; + +#endif diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index d2c48869e1..3b160f858c 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -2,6 +2,7 @@ #define QEMU_HW_ESP_H #include "hw/scsi/scsi.h" +#include "hw/sysbus.h" /* esp.c */ #define ESP_MAX_DEVS 7 @@ -52,6 +53,19 @@ struct ESPState { void (*dma_cb)(ESPState *s); }; +#define TYPE_ESP "esp" +#define ESP_STATE(obj) OBJECT_CHECK(SysBusESPState, (obj), TYPE_ESP) + +typedef struct { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + MemoryRegion iomem; + uint32_t it_shift; + ESPState esp; +} SysBusESPState; + #define ESP_TCLO 0x0 #define ESP_TCMID 0x1 #define ESP_FIFO 0x2 diff --git a/include/hw/sparc/sparc32_dma.h b/include/hw/sparc/sparc32_dma.h index 9497b13d34..ab42c5421b 100644 --- a/include/hw/sparc/sparc32_dma.h +++ b/include/hw/sparc/sparc32_dma.h @@ -1,6 +1,61 @@ #ifndef SPARC32_DMA_H #define SPARC32_DMA_H +#include "hw/sysbus.h" +#include "hw/scsi/esp.h" +#include "hw/net/lance.h" + +#define DMA_REGS 4 + +#define TYPE_SPARC32_DMA_DEVICE "sparc32-dma-device" +#define SPARC32_DMA_DEVICE(obj) OBJECT_CHECK(DMADeviceState, (obj), \ + TYPE_SPARC32_DMA_DEVICE) + +typedef struct DMADeviceState DMADeviceState; + +struct DMADeviceState { + SysBusDevice parent_obj; + + MemoryRegion iomem; + uint32_t dmaregs[DMA_REGS]; + qemu_irq irq; + void *iommu; + qemu_irq gpio[2]; +}; + +#define TYPE_SPARC32_ESPDMA_DEVICE "sparc32-espdma" +#define SPARC32_ESPDMA_DEVICE(obj) OBJECT_CHECK(ESPDMADeviceState, (obj), \ + TYPE_SPARC32_ESPDMA_DEVICE) + +typedef struct ESPDMADeviceState { + DMADeviceState parent_obj; + + SysBusESPState *esp; +} ESPDMADeviceState; + +#define TYPE_SPARC32_LEDMA_DEVICE "sparc32-ledma" +#define SPARC32_LEDMA_DEVICE(obj) OBJECT_CHECK(LEDMADeviceState, (obj), \ + TYPE_SPARC32_LEDMA_DEVICE) + +typedef struct LEDMADeviceState { + DMADeviceState parent_obj; + + SysBusPCNetState *lance; +} LEDMADeviceState; + +#define TYPE_SPARC32_DMA "sparc32-dma" +#define SPARC32_DMA(obj) OBJECT_CHECK(SPARC32DMAState, (obj), \ + TYPE_SPARC32_DMA) + +typedef struct SPARC32DMAState { + SysBusDevice parent_obj; + + MemoryRegion dmamem; + MemoryRegion ledma_alias; + ESPDMADeviceState *espdma; + LEDMADeviceState *ledma; +} SPARC32DMAState; + /* sparc32_dma.c */ void ledma_memory_read(void *opaque, hwaddr addr, uint8_t *buf, int len, int do_bswap); diff --git a/include/hw/sparc/sun4m.h b/include/hw/sparc/sun4m.h index 580d87b252..c557b0dd53 100644 --- a/include/hw/sparc/sun4m.h +++ b/include/hw/sparc/sun4m.h @@ -4,25 +4,30 @@ #include "qemu-common.h" #include "exec/hwaddr.h" #include "qapi/qmp/types.h" +#include "hw/sysbus.h" /* Devices used by sparc32 system. */ /* iommu.c */ -void sparc_iommu_memory_rw(void *opaque, hwaddr addr, - uint8_t *buf, int len, int is_write); -static inline void sparc_iommu_memory_read(void *opaque, - hwaddr addr, - uint8_t *buf, int len) -{ - sparc_iommu_memory_rw(opaque, addr, buf, len, 0); -} - -static inline void sparc_iommu_memory_write(void *opaque, - hwaddr addr, - uint8_t *buf, int len) -{ - sparc_iommu_memory_rw(opaque, addr, buf, len, 1); -} +#define TYPE_SUN4M_IOMMU "sun4m-iommu" +#define SUN4M_IOMMU(obj) OBJECT_CHECK(IOMMUState, (obj), TYPE_SUN4M_IOMMU) + +#define TYPE_SUN4M_IOMMU_MEMORY_REGION "sun4m-iommu-memory-region" + +#define IOMMU_NREGS (4 * 4096 / 4) + +typedef struct IOMMUState { + SysBusDevice parent_obj; + + AddressSpace iommu_as; + IOMMUMemoryRegion iommu; + + MemoryRegion iomem; + uint32_t regs[IOMMU_NREGS]; + hwaddr iostart; + qemu_irq irq; + uint32_t version; +} IOMMUState; /* sparc32_dma.c */ #include "hw/sparc/sparc32_dma.h" |