summary refs log tree commit diff stats
path: root/include/hw
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2024-09-05 13:02:26 +0100
committerPeter Maydell <peter.maydell@linaro.org>2024-09-05 13:02:26 +0100
commit7b87a25f49a301d3377f3e71e0b4a62540c6f6e4 (patch)
tree8f63633cc6e44c3c7d3441291614e0ce3b7f3e8e /include/hw
parentcab1afb393ea0943b3086188e91d71d594ede6bf (diff)
parent0b57c8160a2a6c833cfb1d958f08385c4391ab70 (diff)
downloadfocaccia-qemu-7b87a25f49a301d3377f3e71e0b4a62540c6f6e4.tar.gz
focaccia-qemu-7b87a25f49a301d3377f3e71e0b4a62540c6f6e4.zip
Merge tag 'edgar/xen-queue-2024-09-04.for-upstream' of https://gitlab.com/edgar.iglesias/qemu into staging
Edgars Xen queue.

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEErET+3BT38evtv0FRKcWWeA9ryoMFAmbYfMIACgkQKcWWeA9r
# yoNPfwgAuK6MyPGEJh75Pe7yEmkVeuL0RPTmet5Ie1WrywNsn91IybQGLctpxr1s
# 7m2Zhl3IWXV5Jezfr9gEnLF+LYBQgK0ENJWDTPuIqf7D5ZRtOVeaNqrQVJ10Jomn
# s1pn4kWtHxKsgWTzcdi3qP7vhxn1PllxE+yuOcoYQIHcUp1oQAHr6ApbAcxseWBE
# qPdgxT7nlvFdcKqkzxSgKy5MWjs3xcBg6R5Ywoy+t7lb003swivPnkK6MSt1P03h
# EkQsTWr0Ox4nACOWt15U0MoK5rtBEN7Gsox0FUEPF3QhmAJt75FTFLs8+JhqcnKH
# LMxud5C6t6FcI+kxPqPoIdEWy5uM6g==
# =hW3R
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 04 Sep 2024 16:29:06 BST
# gpg:                using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg:                 aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF  4151 29C5 9678 0F6B CA83

* tag 'edgar/xen-queue-2024-09-04.for-upstream' of https://gitlab.com/edgar.iglesias/qemu:
  docs/system/i386: xenpvh: Add a basic description
  hw/i386/xen: Add a Xen PVH x86 machine
  hw/xen: pvh-common: Add support for creating PCIe/GPEX
  hw/arm: xenpvh: Reverse virtio-mmio creation order
  hw/arm: xenpvh: Rename xen_arm.c -> xen-pvh.c
  hw/arm: xenpvh: Break out a common PVH machine
  hw/arm: xenpvh: Move stubbed functions to xen-stubs.c
  hw/arm: xenpvh: Remove double-negation in warning
  hw/arm: xenpvh: Add support for SMP guests
  hw/arm: xenpvh: Tweak machine description
  hw/arm: xenpvh: Update file header to use SPDX
  MAINTAINERS: Add docs/system/arm/xenpvh.rst

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/xen/xen-pvh-common.h88
1 files changed, 88 insertions, 0 deletions
diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-common.h
new file mode 100644
index 0000000000..bc09eea936
--- /dev/null
+++ b/include/hw/xen/xen-pvh-common.h
@@ -0,0 +1,88 @@
+/*
+ * QEMU Xen PVH machine - common code.
+ *
+ * Copyright (c) 2024 Advanced Micro Devices, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef XEN_PVH_COMMON_H__
+#define XEN_PVH_COMMON_H__
+
+#include <assert.h>
+#include "hw/sysbus.h"
+#include "hw/hw.h"
+#include "hw/xen/xen-hvm-common.h"
+#include "hw/pci-host/gpex.h"
+
+#define TYPE_XEN_PVH_MACHINE MACHINE_TYPE_NAME("xen-pvh-base")
+OBJECT_DECLARE_TYPE(XenPVHMachineState, XenPVHMachineClass,
+                    XEN_PVH_MACHINE)
+
+struct XenPVHMachineClass {
+    MachineClass parent;
+
+    /* PVH implementation specific init.  */
+    void (*init)(MachineState *state);
+
+    /*
+     * set_pci_intx_irq - Deliver INTX irqs to the guest.
+     *
+     * @opaque: pointer to XenPVHMachineState.
+     * @irq: IRQ after swizzling, between 0-3.
+     * @level: IRQ level.
+     */
+    void (*set_pci_intx_irq)(void *opaque, int irq, int level);
+
+    /*
+     * set_pci_link_route: - optional implementation call to setup
+     * routing between INTX IRQ (0 - 3) and GSI's.
+     *
+     * @line: line the INTx line (0 => A .. 3 => B)
+     * @irq: GSI
+     */
+    int (*set_pci_link_route)(uint8_t line, uint8_t irq);
+
+    /*
+     * Each implementation can optionally enable features that it
+     * supports and are known to work.
+     */
+    bool has_pci;
+    bool has_tpm;
+    bool has_virtio_mmio;
+};
+
+struct XenPVHMachineState {
+    /*< private >*/
+    MachineState parent;
+
+    XenIOState ioreq;
+
+    struct {
+        MemoryRegion low;
+        MemoryRegion high;
+    } ram;
+
+    struct {
+        GPEXHost gpex;
+        MemoryRegion mmio_alias;
+        MemoryRegion mmio_high_alias;
+    } pci;
+
+    struct {
+        MemMapEntry ram_low, ram_high;
+        MemMapEntry tpm;
+
+        /* Virtio-mmio */
+        MemMapEntry virtio_mmio;
+        uint32_t virtio_mmio_num;
+        uint32_t virtio_mmio_irq_base;
+
+        /* PCI */
+        MemMapEntry pci_ecam, pci_mmio, pci_mmio_high;
+        uint32_t pci_intx_irq_base;
+    } cfg;
+};
+
+void xen_pvh_class_setup_common_props(XenPVHMachineClass *xpc);
+#endif