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authorMichael Tokarev <mjt@tls.msk.ru>2023-07-14 14:16:12 +0300
committerMichael Tokarev <mjt@tls.msk.ru>2023-09-20 07:54:34 +0300
commitbad5cfcd609f4a04e499da814cbec4dc45114804 (patch)
tree9ad5ca8c92d68aaa12a4459df9cab790d87f1be8 /include/hw
parent944399ffb286b5503e9d97330aaeab1e68779962 (diff)
downloadfocaccia-qemu-bad5cfcd609f4a04e499da814cbec4dc45114804.tar.gz
focaccia-qemu-bad5cfcd609f4a04e499da814cbec4dc45114804.zip
i386: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/i386/topology.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/i386/topology.h b/include/hw/i386/topology.h
index 81573f6cfd..380cb27ded 100644
--- a/include/hw/i386/topology.h
+++ b/include/hw/i386/topology.h
@@ -31,7 +31,7 @@
  *
  * This code should be compatible with AMD's "Extended Method" described at:
  *   AMD CPUID Specification (Publication #25481)
- *   Section 3: Multiple Core Calcuation
+ *   Section 3: Multiple Core Calculation
  * as long as:
  *  nr_threads is set to 1;
  *  OFFSET_IDX is assumed to be 0;