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authorYongbok Kim <yongbok.kim@imgtec.com>2015-10-05 14:45:45 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2015-10-30 14:36:19 +0000
commit35ac9e342e008e3d47ef18d33a6977fdb99de9cd (patch)
tree8c1d815b2f78ef153135d42535c2c700a4843f1b /include/qemu/buffer.h
parentb00c72180c36510bf9b124e190bd520e3b7e1358 (diff)
downloadfocaccia-qemu-35ac9e342e008e3d47ef18d33a6977fdb99de9cd.tar.gz
focaccia-qemu-35ac9e342e008e3d47ef18d33a6977fdb99de9cd.zip
target-mips: Set Config5.XNP for R6 cores
Set Config5.XNP for R6 cores to indicate the extended LL/SC family
of instructions NOT present.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'include/qemu/buffer.h')
0 files changed, 0 insertions, 0 deletions