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| author | Cédric Le Goater <clg@kaod.org> | 2018-01-15 19:04:02 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-01-17 09:35:24 +1100 |
| commit | 09279d7e7b08ebfaaa40060843dbc8f33977548f (patch) | |
| tree | 32f5d6eae09c2ed7607e72aa3181d090a65ea683 /include/qemu/coroutine_int.h | |
| parent | 83028a2b2871d3787e2fb55fe3e5cd2dda6cc378 (diff) | |
| download | focaccia-qemu-09279d7e7b08ebfaaa40060843dbc8f33977548f.tar.gz focaccia-qemu-09279d7e7b08ebfaaa40060843dbc8f33977548f.zip | |
ppc/pnv: change core mask for POWER9
When addressed by XSCOM, the first core has the 0x20 chiplet ID but the CPU PIR can start at 0x0. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/qemu/coroutine_int.h')
0 files changed, 0 insertions, 0 deletions