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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-15 17:24:27 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-15 17:24:28 +0100 |
| commit | 1a3abef74b5df6d6d3e851aaeacac8f265adcf80 (patch) | |
| tree | 64deb73d56895ccebd70c2d8db0527e4b362f76c /include/qemu/host-utils.h | |
| parent | 619622424dba749feef752d76d79ef2569f7f250 (diff) | |
| parent | 461aa6783eec27f209b026c6647fc7a83b2997cd (diff) | |
| download | focaccia-qemu-1a3abef74b5df6d6d3e851aaeacac8f265adcf80.tar.gz focaccia-qemu-1a3abef74b5df6d6d3e851aaeacac8f265adcf80.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tile-20150915' into staging
TileGX basic instructions # gpg: Signature made Tue 15 Sep 2015 15:57:08 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tile-20150915: (35 commits) target-tilegx: Handle v1shl, v1shru, v1shrs target-tilegx: Handle v1shli, v1shrui target-tilegx: Handle v4int_l/h target-tilegx: Handle atomic instructions target-tilegx: Handle mtspr, mfspr target-tilegx: Handle v1cmpeq, v1cmpne target-tilegx: Handle mask instructions target-tilegx: Handle scalar multiply instructions target-tilegx: Handle conditional move instructions target-tilegx: Handle shift instructions target-tilegx: Handle bitfield instructions target-tilegx: Implement system and memory management instructions target-tilegx: Handle comparison instructions target-tilegx: Handle conditional branch instructions target-tilegx: Handle unconditional jump instructions target-tilegx: Handle post-increment load and store instructions target-tilegx: Handle basic load and store instructions target-tilegx: Handle most bit manipulation instructions target-arm: Use new revbit functions host-utils: Add revbit functions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/qemu/host-utils.h')
| -rw-r--r-- | include/qemu/host-utils.h | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h index 7d36ebfd5b..3ef97d503d 100644 --- a/include/qemu/host-utils.h +++ b/include/qemu/host-utils.h @@ -26,6 +26,7 @@ #define HOST_UTILS_H 1 #include "qemu/compiler.h" /* QEMU_GNUC_PREREQ */ +#include "qemu/bswap.h" #include <limits.h> #include <stdbool.h> @@ -391,6 +392,80 @@ static inline int ctpop64(uint64_t val) #endif } +/** + * revbit8 - reverse the bits in an 8-bit value. + * @x: The value to modify. + */ +static inline uint8_t revbit8(uint8_t x) +{ + /* Assign the correct nibble position. */ + x = ((x & 0xf0) >> 4) + | ((x & 0x0f) << 4); + /* Assign the correct bit position. */ + x = ((x & 0x88) >> 3) + | ((x & 0x44) >> 1) + | ((x & 0x22) << 1) + | ((x & 0x11) << 3); + return x; +} + +/** + * revbit16 - reverse the bits in a 16-bit value. + * @x: The value to modify. + */ +static inline uint16_t revbit16(uint16_t x) +{ + /* Assign the correct byte position. */ + x = bswap16(x); + /* Assign the correct nibble position. */ + x = ((x & 0xf0f0) >> 4) + | ((x & 0x0f0f) << 4); + /* Assign the correct bit position. */ + x = ((x & 0x8888) >> 3) + | ((x & 0x4444) >> 1) + | ((x & 0x2222) << 1) + | ((x & 0x1111) << 3); + return x; +} + +/** + * revbit32 - reverse the bits in a 32-bit value. + * @x: The value to modify. + */ +static inline uint32_t revbit32(uint32_t x) +{ + /* Assign the correct byte position. */ + x = bswap32(x); + /* Assign the correct nibble position. */ + x = ((x & 0xf0f0f0f0u) >> 4) + | ((x & 0x0f0f0f0fu) << 4); + /* Assign the correct bit position. */ + x = ((x & 0x88888888u) >> 3) + | ((x & 0x44444444u) >> 1) + | ((x & 0x22222222u) << 1) + | ((x & 0x11111111u) << 3); + return x; +} + +/** + * revbit64 - reverse the bits in a 64-bit value. + * @x: The value to modify. + */ +static inline uint64_t revbit64(uint64_t x) +{ + /* Assign the correct byte position. */ + x = bswap64(x); + /* Assign the correct nibble position. */ + x = ((x & 0xf0f0f0f0f0f0f0f0ull) >> 4) + | ((x & 0x0f0f0f0f0f0f0f0full) << 4); + /* Assign the correct bit position. */ + x = ((x & 0x8888888888888888ull) >> 3) + | ((x & 0x4444444444444444ull) >> 1) + | ((x & 0x2222222222222222ull) << 1) + | ((x & 0x1111111111111111ull) << 3); + return x; +} + /* Host type specific sizes of these routines. */ #if ULONG_MAX == UINT32_MAX @@ -399,12 +474,14 @@ static inline int ctpop64(uint64_t val) # define clol clo32 # define ctol cto32 # define ctpopl ctpop32 +# define revbitl revbit32 #elif ULONG_MAX == UINT64_MAX # define clzl clz64 # define ctzl ctz64 # define clol clo64 # define ctol cto64 # define ctpopl ctpop64 +# define revbitl revbit64 #else # error Unknown sizeof long #endif |