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| author | stove <stove@rivosinc.com> | 2025-08-27 13:36:17 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-10-03 13:15:14 +1000 |
| commit | cebaf7434b4af059caca053ee1ec7ed8df91c2a7 (patch) | |
| tree | cf8f19d66a8778b2c6cb65ce477a9a67ac8287bd /include/qemu | |
| parent | c69fc80035b708a8b997cbab0d393e2702364a3e (diff) | |
| download | focaccia-qemu-cebaf7434b4af059caca053ee1ec7ed8df91c2a7.tar.gz focaccia-qemu-cebaf7434b4af059caca053ee1ec7ed8df91c2a7.zip | |
target/riscv: use riscv_csrr in riscv_csr_read
Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
writes a read-only CSR") changed the behavior of riscv_csrrw, which
would formerly be treated as read-only if the write mask were set to 0.
Fixes an exception being raised when accessing read-only vector CSRs
like vtype.
Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR")
Signed-off-by: stove <stove@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20250827203617.79947-1-stove@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/qemu')
0 files changed, 0 insertions, 0 deletions