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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-11-07 10:42:56 +1100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-16 16:30:25 -0700 |
| commit | 12fde9bcdb52118495d10c32ed375679f23e323c (patch) | |
| tree | af2fc03fc6bf402cad84ec11be6799fd0a373f8f /include | |
| parent | 7b8801071951c55dc506c1fca8b40ba292a28d6e (diff) | |
| download | focaccia-qemu-12fde9bcdb52118495d10c32ed375679f23e323c.tar.gz focaccia-qemu-12fde9bcdb52118495d10c32ed375679f23e323c.zip | |
tcg: Add INDEX_op_qemu_{ld,st}_i128
Add opcodes for backend support for 128-bit memory operations. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/tcg/tcg-opc.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/tcg/tcg-opc.h b/include/tcg/tcg-opc.h index dd444734d9..94cf7c5d6a 100644 --- a/include/tcg/tcg-opc.h +++ b/include/tcg/tcg-opc.h @@ -213,6 +213,14 @@ DEF(qemu_st8_i32, 0, TLADDR_ARGS + 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | IMPL(TCG_TARGET_HAS_qemu_st8_i32)) +/* Only for 64-bit hosts at the moment. */ +DEF(qemu_ld_i128, 2, 1, 1, + TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT | + IMPL(TCG_TARGET_HAS_qemu_ldst_i128)) +DEF(qemu_st_i128, 0, 3, 1, + TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT | + IMPL(TCG_TARGET_HAS_qemu_ldst_i128)) + /* Host vector support. */ #define IMPLVEC TCG_OPF_VECTOR | IMPL(TCG_TARGET_MAYBE_vec) |