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authorJamin Lin <jamin_lin@aspeedtech.com>2025-04-24 15:51:29 +0800
committerCédric Le Goater <clg@redhat.com>2025-05-05 09:38:55 +0200
commit2e143da2fbd92d9c3ae2d7a315efca5c6af24e69 (patch)
tree96fdb332135dc87d6b8dec9bd9b120c241e0cab9 /include
parentaf93cef791b5976b9b6d977da36e25999a6cebe1 (diff)
downloadfocaccia-qemu-2e143da2fbd92d9c3ae2d7a315efca5c6af24e69.tar.gz
focaccia-qemu-2e143da2fbd92d9c3ae2d7a315efca5c6af24e69.zip
hw/arm/aspeed_ast27x0 Introduce vbootrom memory region
Introduce a new vbootrom memory region. The region is mapped at address
"0x00000000" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.

The vbootrom registered in the SoC's address space using the ASPEED_DEV_VBOOTROM
index.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250424075135.3715128-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/arm/aspeed_soc.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index c1e80c8908..4dcb1010dc 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -59,6 +59,7 @@ struct AspeedSoCState {
     MemoryRegion sram;
     MemoryRegion spi_boot_container;
     MemoryRegion spi_boot;
+    MemoryRegion vbootrom;
     AddressSpace dram_as;
     AspeedRtcState rtc;
     AspeedTimerCtrlState timerctrl;
@@ -169,6 +170,7 @@ struct AspeedSoCClass {
 const char *aspeed_soc_cpu_type(AspeedSoCClass *sc);
 
 enum {
+    ASPEED_DEV_VBOOTROM,
     ASPEED_DEV_SPI_BOOT,
     ASPEED_DEV_IOMEM,
     ASPEED_DEV_UART0,