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| author | Lukasz Maniak <lukasz.maniak@linux.intel.com> | 2022-05-09 16:16:09 +0200 |
|---|---|---|
| committer | Klaus Jensen <k.jensen@samsung.com> | 2022-06-23 23:24:28 +0200 |
| commit | 44c2c09488db83b76cab8dd91f7319be82b2bd91 (patch) | |
| tree | 95c64b69c73e8b50efb9a1c305e32aaf976e05df /include | |
| parent | 7db86fe2ed220c196061824e652b94e7a2acbabf (diff) | |
| download | focaccia-qemu-44c2c09488db83b76cab8dd91f7319be82b2bd91.tar.gz focaccia-qemu-44c2c09488db83b76cab8dd91f7319be82b2bd91.zip | |
hw/nvme: Add support for SR-IOV
This patch implements initial support for Single Root I/O Virtualization on an NVMe device. Essentially, it allows to define the maximum number of virtual functions supported by the NVMe controller via sriov_max_vfs parameter. Passing a non-zero value to sriov_max_vfs triggers reporting of SR-IOV capability by a physical controller and ARI capability by both the physical and virtual function devices. NVMe controllers created via virtual functions mirror functionally the physical controller, which may not entirely be the case, thus consideration would be needed on the way to limit the capabilities of the VF. NVMe subsystem is required for the use of SR-IOV. Signed-off-by: Lukasz Maniak <lukasz.maniak@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/pci/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h index 898083b86f..d5ddea558b 100644 --- a/include/hw/pci/pci_ids.h +++ b/include/hw/pci/pci_ids.h @@ -238,6 +238,7 @@ #define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e #define PCI_DEVICE_ID_INTEL_82801D 0x24CD #define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab +#define PCI_DEVICE_ID_INTEL_NVME 0x5845 #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 #define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 |