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| author | Joao Martins <joao.m.martins@oracle.com> | 2022-07-19 18:00:04 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2022-07-26 10:40:58 -0400 |
| commit | 4ab4c33014b4876bc6d7888efecd6bfcca0d045a (patch) | |
| tree | ce71ccf56576058d5ee12cc7787540f340d77812 /include | |
| parent | cb70b7e8712e17e5761a7447defdce5572cd4b80 (diff) | |
| download | focaccia-qemu-4ab4c33014b4876bc6d7888efecd6bfcca0d045a.tar.gz focaccia-qemu-4ab4c33014b4876bc6d7888efecd6bfcca0d045a.zip | |
hw/i386: add 4g boundary start to X86MachineState
Rather than hardcoding the 4G boundary everywhere, introduce a X86MachineState field @above_4g_mem_start and use it accordingly. This is in preparation for relocating ram-above-4g to be dynamically start at 1T on AMD platforms. Signed-off-by: Joao Martins <joao.m.martins@oracle.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220719170014.27028-2-joao.m.martins@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/i386/x86.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h index 6bdf1f6ab2..62fa5774f8 100644 --- a/include/hw/i386/x86.h +++ b/include/hw/i386/x86.h @@ -56,6 +56,9 @@ struct X86MachineState { /* RAM information (sizes, addresses, configuration): */ ram_addr_t below_4g_mem_size, above_4g_mem_size; + /* Start address of the initial RAM above 4G */ + uint64_t above_4g_mem_start; + /* CPU and apic information: */ bool apic_xrupt_override; unsigned pci_irq_mask; |