diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-06-23 20:34:33 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2016-08-05 21:44:40 +0530 |
| commit | 5a18407f55ade924aa6397c9a043a9ffd59645fe (patch) | |
| tree | 9d90c54eca81527f3f423e2daf7b29eccc32a35e /include | |
| parent | c0ef05b5e62ab0c291a94022f14104e61e306f03 (diff) | |
| download | focaccia-qemu-5a18407f55ade924aa6397c9a043a9ffd59645fe.tar.gz focaccia-qemu-5a18407f55ade924aa6397c9a043a9ffd59645fe.zip | |
tcg: Lower indirect registers in a separate pass
Rather than rely on recursion during the middle of register allocation, lower indirect registers to loads and stores off the indirect base into plain temps. For an x86_64 host, with sufficient registers, this results in identical code, modulo the actual register assignments. For an i686 host, with insufficient registers, this means that temps can be (temporarily) spilled to the stack in order to satisfy an allocation. This as opposed to the possibility of not being able to spill, to allocate a register for the indirect base, in order to perform a spill. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/qemu/log.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/qemu/log.h b/include/qemu/log.h index 9ab8f51188..00bf37fc0f 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -42,6 +42,7 @@ static inline bool qemu_log_separate(void) #define CPU_LOG_TB_NOCHAIN (1 << 13) #define CPU_LOG_PAGE (1 << 14) #define LOG_TRACE (1 << 15) +#define CPU_LOG_TB_OP_IND (1 << 16) /* Returns true if a bit is set in the current loglevel mask */ |