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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-21 16:32:19 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-21 16:32:19 +0100 |
| commit | 81ceb36b965c9d5ed5b1eb0ed80e23705802de15 (patch) | |
| tree | 1469b4ccb263ac8f365a2cea9080d6d525cd97c2 /include | |
| parent | 1c81a38c5ae0c4275b5472f690b76c194a03dee8 (diff) | |
| parent | 4b445c926add3fdec13958736e482e88857bcad8 (diff) | |
| download | focaccia-qemu-81ceb36b965c9d5ed5b1eb0ed80e23705802de15.tar.gz focaccia-qemu-81ceb36b965c9d5ed5b1eb0ed80e23705802de15.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210921' into staging
target-arm queue: * Optimize codegen for MVE when predication not active * hvf: Add Apple Silicon support * hw/intc: Set GIC maintenance interrupt level to only 0 or 1 * Fix mishandling of MVE FPSCR.LTPSIZE reset for usermode emulator * elf2dmp: Fix coverity nits # gpg: Signature made Tue 21 Sep 2021 16:31:17 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210921: (27 commits) target/arm: Optimize MVE 1op-immediate insns target/arm: Optimize MVE VSLI and VSRI target/arm: Optimize MVE VSHLL and VMOVL target/arm: Optimize MVE VSHL, VSHR immediate forms target/arm: Optimize MVE VMVN target/arm: Optimize MVE VDUP target/arm: Optimize MVE VNEG, VABS target/arm: Optimize MVE arithmetic ops target/arm: Optimize MVE logic ops target/arm: Add TB flag for "MVE insns not predicated" target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration target/arm: Avoid goto_tb if we're trying to exit to the main loop hvf: arm: Add rudimentary PMC support arm: Add Hypervisor.framework build target hvf: arm: Implement PSCI handling hvf: arm: Implement -cpu host arm/hvf: Add a WFI handler hvf: Add Apple Silicon support hvf: Introduce hvf_arch_init() callback hvf: Add execute to dirty log permission bitmap ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sysemu/hvf_int.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/sysemu/hvf_int.h b/include/sysemu/hvf_int.h index 8b66a4e7d0..6545f7cd61 100644 --- a/include/sysemu/hvf_int.h +++ b/include/sysemu/hvf_int.h @@ -11,7 +11,11 @@ #ifndef HVF_INT_H #define HVF_INT_H +#ifdef __aarch64__ +#include <Hypervisor/Hypervisor.h> +#else #include <Hypervisor/hv.h> +#endif /* hvf_slot flags */ #define HVF_SLOT_LOG (1 << 0) @@ -40,19 +44,25 @@ struct HVFState { int num_slots; hvf_vcpu_caps *hvf_caps; + uint64_t vtimer_offset; }; extern HVFState *hvf_state; struct hvf_vcpu_state { - int fd; + uint64_t fd; + void *exit; + bool vtimer_masked; + sigset_t unblock_ipi_mask; }; void assert_hvf_ok(hv_return_t ret); +int hvf_arch_init(void); int hvf_arch_init_vcpu(CPUState *cpu); void hvf_arch_vcpu_destroy(CPUState *cpu); int hvf_vcpu_exec(CPUState *); hvf_slot *hvf_find_overlap_slot(uint64_t, uint64_t); int hvf_put_registers(CPUState *); int hvf_get_registers(CPUState *); +void hvf_kick_vcpu_thread(CPUState *cpu); #endif |