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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-11-10 13:55:07 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-11-10 13:55:07 +0000 |
| commit | a1a88589dc982f9f8b6c717c2ac98dd71dd4353d (patch) | |
| tree | 335e0541624e71835ff22cd468b1326c9759170c /include | |
| parent | a8b4f9585a0bf5186fca793ce2c5d754cd8ec49a (diff) | |
| parent | 577bf808958d06497928c639efaa473bf8c5e099 (diff) | |
| download | focaccia-qemu-a1a88589dc982f9f8b6c717c2ac98dd71dd4353d.tar.gz focaccia-qemu-a1a88589dc982f9f8b6c717c2ac98dd71dd4353d.zip | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20151110' into staging
target-arm queue: * fix bugs in gdb singlestep handling and breakpoints * minor code cleanup in arm_gic * clean up error messages in hw/arm/virt * fix highbank kernel booting by adding a board-setup blob # gpg: Signature made Tue 10 Nov 2015 13:43:52 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20151110: target-arm: Clean up DISAS_UPDATE usage in AArch32 translation code hw/arm/virt: error_report cleanups arm: highbank: Implement PSCI and dummy monitor arm: highbank: Defeature CPU override arm: boot: Add secure_board_setup flag hw/intc/arm_gic: Remove the definition of NUM_CPU target-arm: Fix gdb singlestep handling in arm_debug_excp_handler() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/arm.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h index 67ba7db3bb..c26b0e357f 100644 --- a/include/hw/arm/arm.h +++ b/include/hw/arm/arm.h @@ -97,6 +97,12 @@ struct arm_boot_info { hwaddr board_setup_addr; void (*write_board_setup)(ARMCPU *cpu, const struct arm_boot_info *info); + + /* If set, the board specific loader/setup blob will be run from secure + * mode, regardless of secure_boot. The blob becomes responsible for + * changing to non-secure state if implementing a non-secure boot + */ + bool secure_board_setup; }; /** |