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authorNicholas Piggin <npiggin@gmail.com>2025-03-03 10:27:01 +1000
committerNicholas Piggin <npiggin@gmail.com>2025-03-11 22:43:30 +1000
commitb899de9a3d959652bf61d671ffa2c2ba23259b15 (patch)
treeb3afd979782362172c3e83302c5b53ac4d04075a /include
parentb9ece4a70c12d749af4b5213f11961aac47ea890 (diff)
downloadfocaccia-qemu-b899de9a3d959652bf61d671ffa2c2ba23259b15.tar.gz
focaccia-qemu-b899de9a3d959652bf61d671ffa2c2ba23259b15.zip
ppc/pnv: Move PNOR to offset 0 in the ISA FW space
skiboot has a bug that does not handle ISA FW access correctly for IDSEL
devices > 0, and the current PNOR default address and size puts 64MB in
device 0 and 64MB in device 1, which causes skiboot to hit this bug and
breaks PNOR accesses.

Move the PNOR address down to 0 for now, so a 256MB PNOR can be accessed
via device 0.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/ppc/pnv_pnor.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h
index 2e37ac88bf..19c2d642e8 100644
--- a/include/hw/ppc/pnv_pnor.h
+++ b/include/hw/ppc/pnv_pnor.h
@@ -13,9 +13,11 @@
 #include "hw/sysbus.h"
 
 /*
- * PNOR offset on the LPC FW address space
+ * PNOR offset on the LPC FW address space. For now this should be 0 because
+ * skiboot 7.1 has a bug where IDSEL > 0 (LPC FW address > 256MB) access is
+ * not performed correctly.
  */
-#define PNOR_SPI_OFFSET         0x0c000000UL
+#define PNOR_SPI_OFFSET         0x00000000UL
 
 #define TYPE_PNV_PNOR  "pnv-pnor"
 OBJECT_DECLARE_SIMPLE_TYPE(PnvPnor, PNV_PNOR)