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authorClément Chigot <chigot@adacore.com>2025-09-30 13:57:16 +0200
committerPeter Maydell <peter.maydell@linaro.org>2025-10-07 10:39:15 +0100
commitb94246a252a3c04424269928a465d3fac02115e8 (patch)
treeffa000fa7892eada615d38b03c22b0a137ae891b /include
parentf1924af144115a159f854500f134c3769ec388df (diff)
downloadfocaccia-qemu-b94246a252a3c04424269928a465d3fac02115e8.tar.gz
focaccia-qemu-b94246a252a3c04424269928a465d3fac02115e8.zip
hw/arm/xlnx-zynqmp: move GIC_NUM_SPI_INTR define in header
This define will be needed in a later patch in XlnxZynqMPState
structure, hence move it within xlnx-zynqmp header.

Add XLXN_ZYNQMP prefix as it's now public.

Signed-off-by: Clément Chigot <chigot@adacore.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Message-id: 20250930115718.437100-2-chigot@adacore.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/arm/xlnx-zynqmp.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index c137ac59e8..6a407c2962 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -67,6 +67,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
 #define XLNX_ZYNQMP_OCM_RAM_SIZE 0x10000
 
 #define XLNX_ZYNQMP_GIC_REGIONS 6
+#define XLNX_ZYNQMP_GIC_NUM_SPI_INTR 160
 
 /*
  * ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets