Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200121' into staging

Remove another limit to NB_MMU_MODES.
Fix compilation using uclibc.
Fix defaulting of -accel parameters.
Tidy cputlb basic routines.
Adjust git.orderfile for decodetree.

# gpg: Signature made Wed 22 Jan 2020 02:44:18 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20200121:
  scripts/git.orderfile: Display decodetree before C source
  cputlb: Hoist timestamp outside of loops over tlbs
  cputlb: Initialize tlbs as flushed
  cputlb: Partially merge tlb_dyn_init into tlb_init
  cputlb: Split out tlb_mmu_flush_locked
  cputlb: Hoist tlb portions in tlb_flush_one_mmuidx_locked
  cputlb: Hoist tlb portions in tlb_mmu_resize_locked
  cputlb: Pass CPUTLBDescFast to tlb_n_entries and sizeof_tlb
  cputlb: Make tlb_n_entries private to cputlb.c
  cputlb: Merge tlb_table_flush_by_mmuidx into tlb_flush_one_mmuidx_locked
  vl: Only choose enabled accelerators in configure_accelerators
  vl: Remove useless test in configure_accelerators
  vl: Reduce scope of variables in configure_accelerators
  vl: Remove unused variable in configure_accelerators
  util/cacheinfo: fix crash when compiling with uClibc
  cputlb: Handle NB_MMU_MODES > TARGET_PAGE_BITS_MIN

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

1 files changed, 0 insertions, 5 deletions

diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index a46116167c..53de19753a 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -234,11 +234,6 @@ static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx,
     return (addr >> TARGET_PAGE_BITS) & size_mask;
 }
 
-static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx)
-{
-    return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1;
-}
-
 /* Find the TLB entry corresponding to the mmu_idx + address pair.  */
 static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx,
                                      target_ulong addr)