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| author | Nicholas Piggin <npiggin@gmail.com> | 2024-07-12 13:16:44 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-07-26 09:21:06 +1000 |
| commit | ca4f47752a14221a26cd2bf4710bb21ad2811a22 (patch) | |
| tree | 4ae0314313780cca399d89dedfd89627db98d658 /include | |
| parent | b1beb69231c8a6a04ec365614e67729ea9af7cbf (diff) | |
| download | focaccia-qemu-ca4f47752a14221a26cd2bf4710bb21ad2811a22.tar.gz focaccia-qemu-ca4f47752a14221a26cd2bf4710bb21ad2811a22.zip | |
ppc/pnv: Add a CPU nmi and resume function
Power CPUs have an execution control facility that can pause, resume, and cause NMIs, among other things. Add a function that will nmi a CPU and resume it if it was paused, in preparation for implementing the control facility. Reviewed-by: Cédric Le Goater <clg@redhat.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/ppc/pnv.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index c56d152889..b7858d310d 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -112,6 +112,8 @@ PnvChip *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb); #define PNV_FDT_ADDR 0x01000000 #define PNV_TIMEBASE_FREQ 512000000ULL +void pnv_cpu_do_nmi_resume(CPUState *cs); + /* * BMC helpers */ |