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| author | qianfan Zhao <qianfanguijin@163.com> | 2023-06-06 10:19:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-06-06 10:19:32 +0100 |
| commit | d1e409c5831b2f48b285a4d00f84fbc6a3a927bb (patch) | |
| tree | 49c425c8ba46df81de4f6c771c490fb05fe190c7 /include | |
| parent | dc2a070d125772fe30384596d4d4ce6d9950b004 (diff) | |
| download | focaccia-qemu-d1e409c5831b2f48b285a4d00f84fbc6a3a927bb.tar.gz focaccia-qemu-d1e409c5831b2f48b285a4d00f84fbc6a3a927bb.zip | |
hw: allwinner-r40: Complete uart devices
R40 has eight UARTs, support both 16450 and 16550 compatible modes. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/allwinner-r40.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h index 3be9dc962b..959b5dc4e0 100644 --- a/include/hw/arm/allwinner-r40.h +++ b/include/hw/arm/allwinner-r40.h @@ -41,6 +41,13 @@ enum { AW_R40_DEV_CCU, AW_R40_DEV_PIT, AW_R40_DEV_UART0, + AW_R40_DEV_UART1, + AW_R40_DEV_UART2, + AW_R40_DEV_UART3, + AW_R40_DEV_UART4, + AW_R40_DEV_UART5, + AW_R40_DEV_UART6, + AW_R40_DEV_UART7, AW_R40_DEV_GIC_DIST, AW_R40_DEV_GIC_CPU, AW_R40_DEV_GIC_HYP, @@ -70,6 +77,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AwR40State, AW_R40) * which are currently emulated by the R40 SoC code. */ #define AW_R40_NUM_MMCS 4 +#define AW_R40_NUM_UARTS 8 struct AwR40State { /*< private >*/ |