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| author | Frederic Konrad <konrad.frederic@yahoo.fr> | 2025-09-30 13:57:18 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-10-07 10:39:15 +0100 |
| commit | e836211f7df4b7102f571a33bf01722c9b9bd8b8 (patch) | |
| tree | 9fc6a76922260eb2d3f473d70d2f5ac1d9a234b6 /include | |
| parent | f51ad36255516a5d41e05734e918b32885923151 (diff) | |
| download | focaccia-qemu-e836211f7df4b7102f571a33bf01722c9b9bd8b8.tar.gz focaccia-qemu-e836211f7df4b7102f571a33bf01722c9b9bd8b8.zip | |
hw/arm/xlnx-zynqmp: wire a second GIC for the Cortex-R5
This wires a second GIC for the Cortex-R5, all the IRQs are split when there is an RPU instanciated. Signed-off-by: Clément Chigot <chigot@adacore.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-id: 20250930115718.437100-4-chigot@adacore.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/xlnx-zynqmp.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 6a407c2962..a3117bd6c5 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -42,6 +42,7 @@ #include "hw/misc/xlnx-zynqmp-crf.h" #include "hw/timer/cadence_ttc.h" #include "hw/usb/hcd-dwc3.h" +#include "hw/core/split-irq.h" #define TYPE_XLNX_ZYNQMP "xlnx-zynqmp" OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP) @@ -106,6 +107,9 @@ struct XlnxZynqMPState { GICState gic; MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES]; + GICState rpu_gic; + SplitIRQ splitter[XLNX_ZYNQMP_GIC_NUM_SPI_INTR]; + MemoryRegion ocm_ram[XLNX_ZYNQMP_NUM_OCM_BANKS]; MemoryRegion *ddr_ram; |