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authorEdgar E. Iglesias <edgar.iglesias@amd.com>2024-08-16 16:00:45 +0200
committerEdgar E. Iglesias <edgar.iglesias@amd.com>2024-09-04 16:50:43 +0200
commitf22e598a72ceecb1ef3ca36f3be8989b5f3bed2c (patch)
tree8ef693068ee26dd1ee0320539d7bc737bfd6ac51 /include
parent692ec9337b93729365a6c55bd1aad8da94a877ca (diff)
downloadfocaccia-qemu-f22e598a72ceecb1ef3ca36f3be8989b5f3bed2c.tar.gz
focaccia-qemu-f22e598a72ceecb1ef3ca36f3be8989b5f3bed2c.zip
hw/xen: pvh-common: Add support for creating PCIe/GPEX
Add support for optionally creating a PCIe/GPEX controller.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/xen/xen-pvh-common.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/include/hw/xen/xen-pvh-common.h b/include/hw/xen/xen-pvh-common.h
index 77fd98b9fe..bc09eea936 100644
--- a/include/hw/xen/xen-pvh-common.h
+++ b/include/hw/xen/xen-pvh-common.h
@@ -26,9 +26,28 @@ struct XenPVHMachineClass {
     void (*init)(MachineState *state);
 
     /*
+     * set_pci_intx_irq - Deliver INTX irqs to the guest.
+     *
+     * @opaque: pointer to XenPVHMachineState.
+     * @irq: IRQ after swizzling, between 0-3.
+     * @level: IRQ level.
+     */
+    void (*set_pci_intx_irq)(void *opaque, int irq, int level);
+
+    /*
+     * set_pci_link_route: - optional implementation call to setup
+     * routing between INTX IRQ (0 - 3) and GSI's.
+     *
+     * @line: line the INTx line (0 => A .. 3 => B)
+     * @irq: GSI
+     */
+    int (*set_pci_link_route)(uint8_t line, uint8_t irq);
+
+    /*
      * Each implementation can optionally enable features that it
      * supports and are known to work.
      */
+    bool has_pci;
     bool has_tpm;
     bool has_virtio_mmio;
 };
@@ -45,6 +64,12 @@ struct XenPVHMachineState {
     } ram;
 
     struct {
+        GPEXHost gpex;
+        MemoryRegion mmio_alias;
+        MemoryRegion mmio_high_alias;
+    } pci;
+
+    struct {
         MemMapEntry ram_low, ram_high;
         MemMapEntry tpm;
 
@@ -52,6 +77,10 @@ struct XenPVHMachineState {
         MemMapEntry virtio_mmio;
         uint32_t virtio_mmio_num;
         uint32_t virtio_mmio_irq_base;
+
+        /* PCI */
+        MemMapEntry pci_ecam, pci_mmio, pci_mmio_high;
+        uint32_t pci_intx_irq_base;
     } cfg;
 };