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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 11:57:15 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-06-20 12:06:05 +0000 |
| commit | 4fdd17dd3505ea5444d08d1347783d2347ec3520 (patch) | |
| tree | 121c1f2fa5e7a857bfc0a5d52c026dcabf0bfab6 /json-parser.c | |
| parent | 08de207bc52108df5d8e9074909e98f5df8e1212 (diff) | |
| download | focaccia-qemu-4fdd17dd3505ea5444d08d1347783d2347ec3520.tar.gz focaccia-qemu-4fdd17dd3505ea5444d08d1347783d2347ec3520.zip | |
target-arm: Convert cp15 crn=10 registers
We RAZ/WI the entire block of crn=10 registers. Note that this actually covers not just the implementation-defined TLB lockdown registers but also a number of v7 VMSA memory attribute registers which we would need to implement to support TEX remap. We retain the previous QEMU behaviour in this conversion, though. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'json-parser.c')
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