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| author | Michael S. Tsirkin <mst@redhat.com> | 2018-03-20 23:01:06 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2018-05-23 03:14:41 +0300 |
| commit | 85e99cf80bec66adf39f948db824a0216daaa486 (patch) | |
| tree | 516ec48f37b9a3591f052a34f46a5b21168bd3df /linux-headers/asm-mips/kvm.h | |
| parent | 43370036476707479a03a90e7e1c526dffbaad4b (diff) | |
| download | focaccia-qemu-85e99cf80bec66adf39f948db824a0216daaa486.tar.gz focaccia-qemu-85e99cf80bec66adf39f948db824a0216daaa486.zip | |
linux-headers: add kvm header for mips
kvm header for MIPS was manually excluded from auto-updates. Update it now to 4.17-rc2. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'linux-headers/asm-mips/kvm.h')
| -rw-r--r-- | linux-headers/asm-mips/kvm.h | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/linux-headers/asm-mips/kvm.h b/linux-headers/asm-mips/kvm.h index 6985eb59b0..edcf717c43 100644 --- a/linux-headers/asm-mips/kvm.h +++ b/linux-headers/asm-mips/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -19,6 +20,10 @@ * Some parts derived from the x86 version of this file. */ +#define __KVM_HAVE_READONLY_MEM + +#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 + /* * for KVM_GET_REGS and KVM_SET_REGS * @@ -52,9 +57,14 @@ struct kvm_fpu { * Register set = 0: GP registers from kvm_regs (see definitions below). * * Register set = 1: CP0 registers. - * bits[15..8] - Must be zero. - * bits[7..3] - Register 'rd' index. - * bits[2..0] - Register 'sel' index. + * bits[15..8] - COP0 register set. + * + * COP0 register set = 0: Main CP0 registers. + * bits[7..3] - Register 'rd' index. + * bits[2..0] - Register 'sel' index. + * + * COP0 register set = 1: MAARs. + * bits[7..0] - MAAR index. * * Register set = 2: KVM specific registers (see definitions below). * @@ -113,6 +123,15 @@ struct kvm_fpu { /* + * KVM_REG_MIPS_CP0 - Coprocessor 0 registers. + */ + +#define KVM_REG_MIPS_MAAR (KVM_REG_MIPS_CP0 | (1 << 8)) +#define KVM_REG_MIPS_CP0_MAAR(n) (KVM_REG_MIPS_MAAR | \ + KVM_REG_SIZE_U64 | (n)) + + +/* * KVM_REG_MIPS_KVM - KVM specific control registers. */ |