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| author | Blue Swirl <blauwirbel@gmail.com> | 2012-02-04 09:37:55 +0000 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2012-02-04 09:37:55 +0000 |
| commit | f0c4d3ebc31969457850a710c25e663880072ed7 (patch) | |
| tree | 70ef445017f842cbdb3c439d1b8a8c201e3f1fcc /linux-headers/asm-x86/hyperv.h | |
| parent | c9344f2220ec9878493af5a39b7f0f337e58123a (diff) | |
| parent | a496e8eeba51351af136734e475c947a3673dded (diff) | |
| download | focaccia-qemu-f0c4d3ebc31969457850a710c25e663880072ed7.tar.gz focaccia-qemu-f0c4d3ebc31969457850a710c25e663880072ed7.zip | |
Merge branch 'for-upstream' of git://repo.or.cz/qemu/agraf
* 'for-upstream' of git://repo.or.cz/qemu/agraf: (21 commits) PPC: E500: Populate L1CFG0 SPR PPC: e500mc: Enable processor control PPC: E500: Implement msgsnd PPC: E500: Implement msgclr PPC: Enable doorbell excp handlers PPC: Add CPU feature for processor control PPC: E500: Add doorbell defines PPC: E500: Add some more excp vectors KVM: Fix compilation on non-x86 PPC: booke206: move avail check to tlbwe PPC: booke206: Check for TLB overrun PPC: booke206: Implement tlbilx PPC: booke206: Check for min/max TLB entry size PPC: booke: add tlbnps handling PPC: booke206: allow NULL raddr in ppcmas_tlb_check PPC: rename msync to msync_4xx PPC: e500: msync is 440 only, e500 has real sync PPC: e500mc: add missing IVORs to bitmap PPC: Add IVOR 38-42 PPC: KVM: Update HIOR code to new interface ...
Diffstat (limited to 'linux-headers/asm-x86/hyperv.h')
| -rw-r--r-- | linux-headers/asm-x86/hyperv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/linux-headers/asm-x86/hyperv.h b/linux-headers/asm-x86/hyperv.h index 5df477ac3a..b80420bcd0 100644 --- a/linux-headers/asm-x86/hyperv.h +++ b/linux-headers/asm-x86/hyperv.h @@ -189,5 +189,6 @@ #define HV_STATUS_INVALID_HYPERCALL_CODE 2 #define HV_STATUS_INVALID_HYPERCALL_INPUT 3 #define HV_STATUS_INVALID_ALIGNMENT 4 +#define HV_STATUS_INSUFFICIENT_BUFFERS 19 #endif |