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authorRichard Henderson <richard.henderson@linaro.org>2023-04-29 23:07:17 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-04-29 23:07:17 +0100
commit7c18f2d663521f1b31b821a13358ce38075eaf7d (patch)
treebdef21def74ac7aa70851f7dc7a38f6263d3ce60 /linux-headers/asm-x86/kvm.h
parent9b112b1b79f0e93242a9ce9bffd1113458e93e03 (diff)
parent42abcc584174166342297421209932a87bdb85f1 (diff)
downloadfocaccia-qemu-7c18f2d663521f1b31b821a13358ce38075eaf7d.tar.gz
focaccia-qemu-7c18f2d663521f1b31b821a13358ce38075eaf7d.zip
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* Fix compilation issues under Debian 10
* Update kernel headers to 6.3rc5
* Suppress GCC13 false positive in aio_bh_poll()
* Add new x86 feature bits
* Coverity fixes
* More steps towards removing qatomic_mb_set/read
* Fix reduced-phys-bits value for AMD SEV

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# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  cpus-common: stop using mb_set/mb_read
  async: Suppress GCC13 false positive in aio_bh_poll()
  tests: vhost-user-test: release mutex on protocol violation
  Update linux headers to v6.3rc5
  update-linux-headers.sh: Add missing kernel headers.
  Fix libvhost-user.c compilation.
  target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration
  target/i386: Add support for AVX-NE-CONVERT in CPUID enumeration
  target/i386: Add support for AVX-VNNI-INT8 in CPUID enumeration
  target/i386: Add support for AVX-IFMA in CPUID enumeration
  target/i386: Add support for AMX-FP16 in CPUID enumeration
  target/i386: Add support for CMPCCXADD in CPUID enumeration
  i386/cpu: Update how the EBX register of CPUID 0x8000001F is set
  i386/sev: Update checks and information related to reduced-phys-bits
  qemu-options.hx: Update the reduced-phys-bits documentation
  qapi, i386/sev: Change the reduced-phys-bits value from 5 to 1

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-headers/asm-x86/kvm.h')
-rw-r--r--linux-headers/asm-x86/kvm.h34
1 files changed, 32 insertions, 2 deletions
diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h
index 2747d2ce14..2937e7bf69 100644
--- a/linux-headers/asm-x86/kvm.h
+++ b/linux-headers/asm-x86/kvm.h
@@ -9,6 +9,7 @@
 
 #include <linux/types.h>
 #include <linux/ioctl.h>
+#include <linux/stddef.h>
 
 #define KVM_PIO_PAGE_OFFSET 1
 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
@@ -505,8 +506,8 @@ struct kvm_nested_state {
 	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
 	 */
 	union {
-		struct kvm_vmx_nested_state_data vmx[0];
-		struct kvm_svm_nested_state_data svm[0];
+		__DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
+		__DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
 	} data;
 };
 
@@ -523,6 +524,35 @@ struct kvm_pmu_event_filter {
 #define KVM_PMU_EVENT_ALLOW 0
 #define KVM_PMU_EVENT_DENY 1
 
+#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS BIT(0)
+#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
+
+/*
+ * Masked event layout.
+ * Bits   Description
+ * ----   -----------
+ * 7:0    event select (low bits)
+ * 15:8   umask match
+ * 31:16  unused
+ * 35:32  event select (high bits)
+ * 36:54  unused
+ * 55     exclude bit
+ * 63:56  umask mask
+ */
+
+#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \
+	(((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \
+	(((mask) & 0xFFULL) << 56) | \
+	(((match) & 0xFFULL) << 8) | \
+	((__u64)(!!(exclude)) << 55))
+
+#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \
+	(GENMASK_ULL(7, 0) | GENMASK_ULL(35, 32))
+#define KVM_PMU_MASKED_ENTRY_UMASK_MASK		(GENMASK_ULL(63, 56))
+#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH	(GENMASK_ULL(15, 8))
+#define KVM_PMU_MASKED_ENTRY_EXCLUDE		(BIT_ULL(55))
+#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT	(56)
+
 /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
 #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
 #define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */