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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-01-04 22:15:45 +0000 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-01-07 19:17:59 +0000 |
| commit | b0d2b7d0f084f6b33acf7c722790da683916fee3 (patch) | |
| tree | b54464113094ead3227aa55fde63c3de0aba7358 /linux-user/arm/target_cpu.h | |
| parent | fea505221eaf87889000378d4d33ad0dfd5f4d9d (diff) | |
| download | focaccia-qemu-b0d2b7d0f084f6b33acf7c722790da683916fee3.tar.gz focaccia-qemu-b0d2b7d0f084f6b33acf7c722790da683916fee3.zip | |
target-arm: A64: Implement minimal set of EL0-visible sysregs
Implement an initial minimal set of EL0-visible system registers: * NZCV * FPCR * FPSR * CTR_EL0 * DCZID_EL0 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'linux-user/arm/target_cpu.h')
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