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authorVíctor Colombo <victor.colombo@eldorado.org.br>2022-09-06 09:55:19 -0300
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-09-20 10:54:06 -0300
commit3ecec4c0429f65de1822b881ea732689cf647254 (patch)
tree3de646cedf3993aa5041e66d30b325cae0274b2c /linux-user/cpu_loop-common.h
parent34f760bac2c9a32afae150fbcc56ceba399d61de (diff)
downloadfocaccia-qemu-3ecec4c0429f65de1822b881ea732689cf647254.tar.gz
focaccia-qemu-3ecec4c0429f65de1822b881ea732689cf647254.zip
target/ppc: Set result to QNaN for DENBCD when VXCVI occurs
According to the ISA, for instruction DENBCD:
"If an invalid BCD digit or sign code is detected in the source
operand, an invalid-operation exception (VXCVI) occurs."

In the Invalid Operation Exception section, there is the situation:
"When Invalid Operation Exception is disabled (VE=0) and Invalid
Operation occurs (...) If the operation is an (...) or format the
target FPR is set to a Quiet NaN". This was not being done in
QEMU.

This patch sets the result to QNaN when the instruction DENBCD causes
an Invalid Operation Exception.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'linux-user/cpu_loop-common.h')
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