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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-06-05 10:24:03 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-05 10:24:03 -0700 |
| commit | 535ad16c5d668f6185be2f88c6c82bf8e452c45d (patch) | |
| tree | 6d95d2e96f454a9d6cae021b0aa10f6e44d2e373 /linux-user/main.c | |
| parent | f1572ab94738bd5787b7badcd4bd93a3657f0680 (diff) | |
| parent | b12b72274320ce3ee516d963efd48766163cb240 (diff) | |
| download | focaccia-qemu-535ad16c5d668f6185be2f88c6c82bf8e452c45d.tar.gz focaccia-qemu-535ad16c5d668f6185be2f88c6c82bf8e452c45d.zip | |
Merge tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu into staging
target/sparc: Implement FMAF, IMA, VIS3 and VIS4 extensions linux-user: Add ioctl for BLKBSZSET # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZgjpgdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV98zwf+OUnUolzhyhBFcCuo # xZRuHiQLgPMLvBpBCY7OcGMTHjh53pYRJAKuSd623WaIs8olshdgo4xRc2tn6WAb # oSoABkiJ0H/f7N8XGC7cDVvpG9kCbtXJfzz6s3GkoEWGu557ecflsV5ODEoyeI3O # otilWnCsj43bt7lyltS4YGHWU7Dc9MBLrziPnSWhHuyTv1olFJFXoBAentZnfIAa # lKTu0y/koqael15cUZfYCYDinot5ssIh906E2u7q5Rd9T0N+IGmmQ3auybMLlGR8 # 8lw4UR0LceErHP6/GTT6VgSHeiaLXBQmqKeTXu+6Yy+ABH21b4Nkgj+PHdv2lxRf # h057tw== # =E35I # -----END PGP SIGNATURE----- # gpg: Signature made Wed 05 Jun 2024 09:13:12 AM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-sp-20240605' of https://gitlab.com/rth7680/qemu: (38 commits) target/sparc: Enable VIS4 feature bit target/sparc: Implement monitor ASIs target/sparc: Implement MWAIT target/sparc: Implement SUBXC, SUBXCcc target/sparc: Implement FPMIN, FPMAX target/sparc: Implement VIS4 comparisons target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS target/sparc: Implement FALIGNDATAi target/sparc: Add feature bit for VIS4 target/sparc: Implement IMA extension target/sparc: Enable VIS3 feature bit target/sparc: Implement XMULX target/sparc: Implement UMULXHI target/sparc: Implement PDISTN target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd target/sparc: Implement LZCNT target/sparc: Implement LDXEFSR target/sparc: Implement FSLL, FSRL, FSRA, FSLAS target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 target/sparc: Implement FPADDS, FPSUBS ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/main.c')
0 files changed, 0 insertions, 0 deletions