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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-18 22:43:33 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-18 22:43:33 +0000
commit8098ed414ada4265f646e94d65eca063b3689f50 (patch)
tree4bcb312026eee379d04427b54edae8a42289f186 /linux-user/main.c
parent2231ef1084f1522508880e99ba60647f8d312c74 (diff)
downloadfocaccia-qemu-8098ed414ada4265f646e94d65eca063b3689f50.tar.gz
focaccia-qemu-8098ed414ada4265f646e94d65eca063b3689f50.zip
PCI: Mask writes to RO bits in the status reg of PCI config space
The Status register in the PCI config space has some read-only bits.
Any writes to those bits should be masked out.

Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6091 c046a42c-6fe2-441c-8c8c-71466251a162
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