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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-07-28 09:24:31 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-08-28 06:39:25 +1000 |
| commit | f8498e084eaa7f78d455d5f2f7a308a4d0d5f39b (patch) | |
| tree | ebb027551a45095cb127f79d60859628a5c5513c /linux-user/mips/elfload.c | |
| parent | f10c3d90849da63916905f7bd155d5737aa4378f (diff) | |
| download | focaccia-qemu-f8498e084eaa7f78d455d5f2f7a308a4d0d5f39b.tar.gz focaccia-qemu-f8498e084eaa7f78d455d5f2f7a308a4d0d5f39b.zip | |
linux-user: Move get_elf_base_platform to mips/elfload.c
Pass in CPUState; define HAVE_ELF_BASE_PLATFORM. Since this was the only instance of ELF_BASE_PLATFORM, go ahead and provide the stub definition for other platforms. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/mips/elfload.c')
| -rw-r--r-- | linux-user/mips/elfload.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/linux-user/mips/elfload.c b/linux-user/mips/elfload.c index 739f71c21b..c353ccc1ad 100644 --- a/linux-user/mips/elfload.c +++ b/linux-user/mips/elfload.c @@ -92,3 +92,33 @@ abi_ulong get_elf_hwcap(CPUState *cs) #undef GET_FEATURE_REG_EQU #undef GET_FEATURE_REG_SET #undef GET_FEATURE_INSN + +#define MATCH_PLATFORM_INSN(_flags, _base_platform) \ + do { if ((cpu->env.insn_flags & (_flags)) == _flags) \ + { return _base_platform; } } while (0) + +const char *get_elf_base_platform(CPUState *cs) +{ + MIPSCPU *cpu = MIPS_CPU(cs); + + /* 64 bit ISAs goes first */ + MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6"); + MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5"); + MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2"); + MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64"); + MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5"); + MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4"); + MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3"); + + /* 32 bit ISAs */ + MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6"); + MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5"); + MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2"); + MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32"); + MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2"); + + /* Fallback */ + return "mips"; +} + +#undef MATCH_PLATFORM_INSN |