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authorPeter Maydell <peter.maydell@linaro.org>2020-08-28 22:30:11 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-08-28 22:30:11 +0100
commit39335fab59e11cfda9b7cf63929825db2dd3a3e0 (patch)
treedd340a5e7c2d827dbf32178d0817d8511c8b7ba9 /linux-user/qemu.h
parenta4e236b7d4badcd7383ed3cb86655e9bba0583cf (diff)
parentcac46eb021fbbac77f1f98223b19608f31fc2236 (diff)
downloadfocaccia-qemu-39335fab59e11cfda9b7cf63929825db2dd3a3e0.tar.gz
focaccia-qemu-39335fab59e11cfda9b7cf63929825db2dd3a3e0.zip
Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.2-pull-request' into staging
add utimensat_time64, semtimedop_time64, rt_sigtimedwait_time64,
    sched_rr_get_interval_time64, clock_nanosleep_time64, clock_adjtime64,
    mq_timedsend_time64, mq_timedreceive_time64
fix semop, semtimedop, clock_nanosleep, mq_timedsend, target_to_host_timespec64
fix tembits.h
add more strace function
Add upport DRM_IOCTL_I915_GETPARAM
detect mismatched ELF ABI in qemu-mips[n32][el]

# gpg: Signature made Fri 28 Aug 2020 14:37:33 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-5.2-pull-request:
  linux-user: Add support for utimensat_time64() and semtimedop_time64()
  linux-user: Add support for 'rt_sigtimedwait_time64()' and 'sched_rr_get_interval_time64()'
  linux-user: Add support for 'clock_nanosleep_time64()' and 'clock_adjtime64()'
  linux-user: Add support for 'mq_timedsend_time64()' and 'mq_timedreceive_time64()'
  linux-user: fix target_to_host_timespec64()
  linux-user: Fix 'mq_timedsend()' and 'mq_timedreceive()'
  linux-user: detect mismatched ELF ABI in qemu-mips[n32][el]
  linux-user: Add strace support for printing arguments for ioctls used for terminals and serial lines
  linux-user: Add missing termbits types and values definitions
  linux-user: Add generic 'termbits.h' for some archs
  linux-user: Add strace support for printing arguments of some clock and time functions
  linux-user: Add an api to print enumareted argument values with strace
  linux-user: Add strace support for printing arguments of syscalls used to lock and unlock memory
  linux-user: Add strace support for printing arguments of truncate()/ftruncate() and getsid()
  linux-user: Make cpu_env accessible in strace.c
  linux-user: syscall: ioctls: support DRM_IOCTL_I915_GETPARAM
  linux-user: Fix 'clock_nanosleep()' implementation
  linux-user: Fix 'semop()' and 'semtimedop()' implementation

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'linux-user/qemu.h')
-rw-r--r--linux-user/qemu.h40
1 files changed, 38 insertions, 2 deletions
diff --git a/linux-user/qemu.h b/linux-user/qemu.h
index 5c964389c1..a69a0bd347 100644
--- a/linux-user/qemu.h
+++ b/linux-user/qemu.h
@@ -400,10 +400,10 @@ extern long safe_syscall_base(int *pending, long number, ...);
 int host_to_target_waitstatus(int status);
 
 /* strace.c */
-void print_syscall(int num,
+void print_syscall(void *cpu_env, int num,
                    abi_long arg1, abi_long arg2, abi_long arg3,
                    abi_long arg4, abi_long arg5, abi_long arg6);
-void print_syscall_ret(int num, abi_long ret,
+void print_syscall_ret(void *cpu_env, int num, abi_long ret,
                        abi_long arg1, abi_long arg2, abi_long arg3,
                        abi_long arg4, abi_long arg5, abi_long arg6);
 /**
@@ -706,6 +706,42 @@ static inline uint64_t target_offset64(uint64_t word0, uint64_t word1)
 }
 #endif /* TARGET_ABI_BITS != 32 */
 
+void print_termios(void *arg);
+
+/* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
+#ifdef TARGET_ARM
+static inline int regpairs_aligned(void *cpu_env, int num)
+{
+    return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
+}
+#elif defined(TARGET_MIPS) && (TARGET_ABI_BITS == 32)
+static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
+#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
+/*
+ * SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
+ * of registers which translates to the same as ARM/MIPS, because we start with
+ * r3 as arg1
+ */
+static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
+#elif defined(TARGET_SH4)
+/* SH4 doesn't align register pairs, except for p{read,write}64 */
+static inline int regpairs_aligned(void *cpu_env, int num)
+{
+    switch (num) {
+    case TARGET_NR_pread64:
+    case TARGET_NR_pwrite64:
+        return 1;
+
+    default:
+        return 0;
+    }
+}
+#elif defined(TARGET_XTENSA)
+static inline int regpairs_aligned(void *cpu_env, int num) { return 1; }
+#else
+static inline int regpairs_aligned(void *cpu_env, int num) { return 0; }
+#endif
+
 /**
  * preexit_cleanup: housekeeping before the guest exits
  *