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authorRichard Henderson <richard.henderson@linaro.org>2022-01-07 13:32:35 -0800
committerLaurent Vivier <laurent@vivier.eu>2022-01-11 18:40:44 +0100
commit6f3533dd1b6afbce8d215bb89027fa5b7caa4168 (patch)
tree35b02ea7dc72f42e2cb6776807b06a81252cc453 /linux-user/riscv/cpu_loop.c
parent73c0aa6a85253d1d5df6a7dfa14c7568e084cf96 (diff)
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target/mips: Extract break code into env->error_code
Simplify cpu_loop by doing all of the decode in translate.

This fixes a bug in that cpu_loop was not handling the
different layout of the R6 version of break16.  This fixes
a bug in that cpu_loop extracted the wrong bits for the
mips16e break16 instruction.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-17-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user/riscv/cpu_loop.c')
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