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authorPeter Maydell <peter.maydell@linaro.org>2017-07-19 14:42:18 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-07-19 14:42:18 +0100
commita51568b78ea011e0f1e67664b8b0c6b693f8ee5a (patch)
treeeaffda17128a3b6ad2b56486501a30d8ebb508df /linux-user/signal.c
parent6d60e295ef020759a03b90724d0342012c189ba2 (diff)
parentec2eb22ebb3b36f39755414dcbe4f99c2c0562c9 (diff)
downloadfocaccia-qemu-a51568b78ea011e0f1e67664b8b0c6b693f8ee5a.tar.gz
focaccia-qemu-a51568b78ea011e0f1e67664b8b0c6b693f8ee5a.zip
Merge remote-tracking branch 'remotes/aurel/tags/pull-target-sh4-20170718' into staging
Queued target/sh4 patches

# gpg: Signature made Tue 18 Jul 2017 22:44:25 BST
# gpg:                using RSA key 0xBA9C78061DDD8C9B
# gpg: Good signature from "Aurelien Jarno <aurelien@aurel32.net>"
# gpg:                 aka "Aurelien Jarno <aurelien@jarno.fr>"
# gpg:                 aka "Aurelien Jarno <aurel32@debian.org>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7746 2642 A9EF 94FD 0F77  196D BA9C 7806 1DDD 8C9B

* remotes/aurel/tags/pull-target-sh4-20170718: (31 commits)
  target/sh4: Use tcg_gen_lookup_and_goto_ptr
  target/sh4: Implement fsrra
  target/sh4: Add missing FPSCR.PR == 0 checks
  target/sh4: Implement fpchg
  target/sh4: Introduce CHECK_SH4A
  target/sh4: Introduce CHECK_FPSCR_PR_*
  target/sh4: Tidy misc illegal insn checks
  target/sh4: Unify code for CHECK_FPU_ENABLED
  target/sh4: Unify code for CHECK_PRIVILEGED
  target/sh4: Unify code for CHECK_NOT_DELAY_SLOT
  target/sh4: Simplify 64-bit fp reg-reg move
  target/sh4: Load/store Dr as 64-bit quantities
  target/sh4: Merge DREG into fpr64 routines
  target/sh4: Eliminate unused XREG macro
  target/sh4: Hoist fp register bank selection
  target/sh4: Pass DisasContext to fpr64 routines
  target/sh4: Unify cpu_fregs into FREG
  target/sh4: Hoist register bank selection
  linux-user/sh4: Clean env->flags on signal boundaries
  linux-user/sh4: Notice gUSA regions during signal delivery
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'linux-user/signal.c')
-rw-r--r--linux-user/signal.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 3d18d1b3ee..d68bd26013 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -3471,6 +3471,30 @@ static abi_ulong get_sigframe(struct target_sigaction *ka,
     return (sp - frame_size) & -8ul;
 }
 
+/* Notice when we're in the middle of a gUSA region and reset.
+   Note that this will only occur for !parallel_cpus, as we will
+   translate such sequences differently in a parallel context.  */
+static void unwind_gusa(CPUSH4State *regs)
+{
+    /* If the stack pointer is sufficiently negative, and we haven't
+       completed the sequence, then reset to the entry to the region.  */
+    /* ??? The SH4 kernel checks for and address above 0xC0000000.
+       However, the page mappings in qemu linux-user aren't as restricted
+       and we wind up with the normal stack mapped above 0xF0000000.
+       That said, there is no reason why the kernel should be allowing
+       a gUSA region that spans 1GB.  Use a tighter check here, for what
+       can actually be enabled by the immediate move.  */
+    if (regs->gregs[15] >= -128u && regs->pc < regs->gregs[0]) {
+        /* Reset the PC to before the gUSA region, as computed from
+           R0 = region end, SP = -(region size), plus one more for the
+           insn that actually initializes SP to the region size.  */
+        regs->pc = regs->gregs[0] + regs->gregs[15] - 2;
+
+        /* Reset the SP to the saved version in R1.  */
+        regs->gregs[15] = regs->gregs[1];
+    }
+}
+
 static void setup_sigcontext(struct target_sigcontext *sc,
                              CPUSH4State *regs, unsigned long mask)
 {
@@ -3525,6 +3549,7 @@ static void restore_sigcontext(CPUSH4State *regs, struct target_sigcontext *sc)
     __get_user(regs->fpul, &sc->sc_fpul);
 
     regs->tra = -1;         /* disable syscall checks */
+    regs->flags &= ~(DELAY_SLOT_MASK | GUSA_MASK);
 }
 
 static void setup_frame(int sig, struct target_sigaction *ka,
@@ -3534,6 +3559,8 @@ static void setup_frame(int sig, struct target_sigaction *ka,
     abi_ulong frame_addr;
     int i;
 
+    unwind_gusa(regs);
+
     frame_addr = get_sigframe(ka, regs->gregs[15], sizeof(*frame));
     trace_user_setup_frame(regs, frame_addr);
     if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) {
@@ -3566,6 +3593,7 @@ static void setup_frame(int sig, struct target_sigaction *ka,
     regs->gregs[5] = 0;
     regs->gregs[6] = frame_addr += offsetof(typeof(*frame), sc);
     regs->pc = (unsigned long) ka->_sa_handler;
+    regs->flags &= ~(DELAY_SLOT_MASK | GUSA_MASK);
 
     unlock_user_struct(frame, frame_addr, 1);
     return;
@@ -3583,6 +3611,8 @@ static void setup_rt_frame(int sig, struct target_sigaction *ka,
     abi_ulong frame_addr;
     int i;
 
+    unwind_gusa(regs);
+
     frame_addr = get_sigframe(ka, regs->gregs[15], sizeof(*frame));
     trace_user_setup_rt_frame(regs, frame_addr);
     if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) {
@@ -3626,6 +3656,7 @@ static void setup_rt_frame(int sig, struct target_sigaction *ka,
     regs->gregs[5] = frame_addr + offsetof(typeof(*frame), info);
     regs->gregs[6] = frame_addr + offsetof(typeof(*frame), uc);
     regs->pc = (unsigned long) ka->_sa_handler;
+    regs->flags &= ~(DELAY_SLOT_MASK | GUSA_MASK);
 
     unlock_user_struct(frame, frame_addr, 1);
     return;