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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-02-15 19:45:11 -1000 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2023-03-10 20:45:47 +0100 |
| commit | 97ff1478d2783b8c0e71540085aec66a70f2d52b (patch) | |
| tree | 885efe8fcdd16bc2eeaacabee17fc1e90243fdde /linux-user/sparc/cpu_loop.c | |
| parent | 6abc58eb9772aad23d12c4c43dda7713576b58ac (diff) | |
| download | focaccia-qemu-97ff1478d2783b8c0e71540085aec66a70f2d52b.tar.gz focaccia-qemu-97ff1478d2783b8c0e71540085aec66a70f2d52b.zip | |
linux-user/sparc: Handle priviledged opcode trap
For the most part priviledged opcodes are ifdefed out of the user-only sparc translator, which will then incorrectly produce illegal opcode traps. But there are some code paths that properly raise TT_PRIV_INSN, so we must handle it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230216054516.1267305-11-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user/sparc/cpu_loop.c')
| -rw-r--r-- | linux-user/sparc/cpu_loop.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index a3edb353f6..61b6e81459 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -303,6 +303,9 @@ void cpu_loop (CPUSPARCState *env) case TT_ILL_INSN: force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->pc); break; + case TT_PRIV_INSN: + force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->pc); + break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); break; |