summary refs log tree commit diff stats
path: root/linux-user/sparc/cpu_loop.c
diff options
context:
space:
mode:
authorStafford Horne <shorne@gmail.com>2022-05-20 22:38:13 +0900
committerStafford Horne <shorne@gmail.com>2022-09-04 07:02:57 +0100
commitb5fcfe927b7a9cbbc0864e7fc4f34bc94631ee0e (patch)
treec6c2e4eaadc4964ad6170927e77040fff9ca6bbe /linux-user/sparc/cpu_loop.c
parent65f5144e1726c36c97df7e70484250941aafaa27 (diff)
downloadfocaccia-qemu-b5fcfe927b7a9cbbc0864e7fc4f34bc94631ee0e.tar.gz
focaccia-qemu-b5fcfe927b7a9cbbc0864e7fc4f34bc94631ee0e.zip
hw/openrisc: Add the OpenRISC virtual machine
This patch adds the OpenRISC virtual machine 'virt' for OpenRISC.  This
platform allows for a convenient CI platform for toolchain, software
ports and the OpenRISC linux kernel port.

Much of this has been sourced from the m68k and riscv virt platforms.

The platform provides:
 - OpenRISC SMP with up to 4 cpus
 - A virtio bus with up to 8 devices
 - Standard ns16550a serial
 - Goldfish RTC
 - SiFive TEST device for poweroff and reboot
 - Generated Device Tree to automatically configure the guest kernel

Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'linux-user/sparc/cpu_loop.c')
0 files changed, 0 insertions, 0 deletions