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| author | Sia Jee Heng <jeeheng.sia@starfivetech.com> | 2024-01-28 18:14:39 -0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-03-08 15:38:46 +1000 |
| commit | 7dd0b070fa09311a0330d0309c8cd9afeb081e79 (patch) | |
| tree | ad784109590b15d303374e34a752721d9b5b0469 /linux-user/thunk.c | |
| parent | 3011c1dd9c807cf41997d13c9244ea4e92237575 (diff) | |
| download | focaccia-qemu-7dd0b070fa09311a0330d0309c8cd9afeb081e79.tar.gz focaccia-qemu-7dd0b070fa09311a0330d0309c8cd9afeb081e79.zip | |
hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
RISC-V should also generate the SPCR in a manner similar to ARM. Therefore, instead of replicating the code, relocate this function to the common AML build. Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240129021440.17640-2-jeeheng.sia@starfivetech.com> [ Changes by AF: - Add missing Language SPCR entry ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'linux-user/thunk.c')
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