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authorPeter Maydell <peter.maydell@linaro.org>2017-12-15 11:13:43 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-12-15 11:13:43 +0000
commit96a6298889d6de688bc076f5f223b73297f85462 (patch)
tree9d535ac0d94d9aa48a58a8485650055347ac8e28 /numa.c
parent1c3b51a796a8eacfa5dfc840f0d8b736246167d4 (diff)
parent1481fe5fcfeb7fcf3c1ebb9d8c0432e3e0188ccf (diff)
downloadfocaccia-qemu-96a6298889d6de688bc076f5f223b73297f85462.tar.gz
focaccia-qemu-96a6298889d6de688bc076f5f223b73297f85462.zip
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.12-20171215' into staging
ppc patch queue 2017-12-15

First pull request for qemu-2.12.  This has quite a bit of stuff
accumulated while 2.11 was finalizing.  Highlights are:

  * Some preliminary work towards implementing the "XIVE" POWER9
    interrupt controller
  * Some fixes for problems during reboot with MTTCG
  * A substantial TCG performance improvement via
    tcg_get_lookup_and_goto_ptr
  * Numerous assorted cleanups and bugfixes that weren't urgent enough
    for 2.11

# gpg: Signature made Fri 15 Dec 2017 03:14:12 GMT
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.12-20171215: (24 commits)
  spapr: don't initialize PATB entry if max-cpu-compat < power9
  spapr: Assume msi_nonbroken
  spapr: Rename machine init functions for clarity
  target/ppc: introduce the PPC_BIT() macro
  spapr_events: drop bogus cell from "interrupt-ranges" property
  spapr: fix LSI interrupt specifiers in the device tree
  spapr: replace numa_get_node() with lookup in pc-dimm list
  spapr: introduce a spapr_qirq() helper
  spapr: introduce a spapr_irq_set_lsi() helper
  spapr: move the IRQ allocation routines under the machine
  ppc/xics: assign of the CPU 'intc' pointer under the core
  ppc/xics: introduce an icp_create() helper
  spapr/rtas: do not reset the MSR in stop-self command
  spapr/rtas: fix reboot of a a SMP TCG guest
  spapr/rtas: disable the decrementer interrupt when a CPU is unplugged
  e500: fix pci host bridge class/type
  openpic: debug w/ info_report()
  pcc: define the Power-saving mode Exit Cause Enable bits in PowerPCCPUClass
  nvram: add AT24Cx i2c eeprom
  e500: name openpic and pci host bridge
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'numa.c')
-rw-r--r--numa.c94
1 files changed, 0 insertions, 94 deletions
diff --git a/numa.c b/numa.c
index 7151b24d1c..98fa9a4bcf 100644
--- a/numa.c
+++ b/numa.c
@@ -55,92 +55,6 @@ int nb_numa_nodes;
 bool have_numa_distance;
 NodeInfo numa_info[MAX_NODES];
 
-void numa_set_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
-{
-    struct numa_addr_range *range;
-
-    /*
-     * Memory-less nodes can come here with 0 size in which case,
-     * there is nothing to do.
-     */
-    if (!size) {
-        return;
-    }
-
-    range = g_malloc0(sizeof(*range));
-    range->mem_start = addr;
-    range->mem_end = addr + size - 1;
-    QLIST_INSERT_HEAD(&numa_info[node].addr, range, entry);
-}
-
-void numa_unset_mem_node_id(ram_addr_t addr, uint64_t size, uint32_t node)
-{
-    struct numa_addr_range *range, *next;
-
-    QLIST_FOREACH_SAFE(range, &numa_info[node].addr, entry, next) {
-        if (addr == range->mem_start && (addr + size - 1) == range->mem_end) {
-            QLIST_REMOVE(range, entry);
-            g_free(range);
-            return;
-        }
-    }
-}
-
-static void numa_set_mem_ranges(void)
-{
-    int i;
-    ram_addr_t mem_start = 0;
-
-    /*
-     * Deduce start address of each node and use it to store
-     * the address range info in numa_info address range list
-     */
-    for (i = 0; i < nb_numa_nodes; i++) {
-        numa_set_mem_node_id(mem_start, numa_info[i].node_mem, i);
-        mem_start += numa_info[i].node_mem;
-    }
-}
-
-/*
- * Check if @addr falls under NUMA @node.
- */
-static bool numa_addr_belongs_to_node(ram_addr_t addr, uint32_t node)
-{
-    struct numa_addr_range *range;
-
-    QLIST_FOREACH(range, &numa_info[node].addr, entry) {
-        if (addr >= range->mem_start && addr <= range->mem_end) {
-            return true;
-        }
-    }
-    return false;
-}
-
-/*
- * Given an address, return the index of the NUMA node to which the
- * address belongs to.
- */
-uint32_t numa_get_node(ram_addr_t addr, Error **errp)
-{
-    uint32_t i;
-
-    /* For non NUMA configurations, check if the addr falls under node 0 */
-    if (!nb_numa_nodes) {
-        if (numa_addr_belongs_to_node(addr, 0)) {
-            return 0;
-        }
-    }
-
-    for (i = 0; i < nb_numa_nodes; i++) {
-        if (numa_addr_belongs_to_node(addr, i)) {
-            return i;
-        }
-    }
-
-    error_setg(errp, "Address 0x" RAM_ADDR_FMT " doesn't belong to any "
-                "NUMA node", addr);
-    return -1;
-}
 
 static void parse_numa_node(MachineState *ms, NumaNodeOptions *node,
                             Error **errp)
@@ -497,12 +411,6 @@ void parse_numa_opts(MachineState *ms)
             exit(1);
         }
 
-        for (i = 0; i < nb_numa_nodes; i++) {
-            QLIST_INIT(&numa_info[i].addr);
-        }
-
-        numa_set_mem_ranges();
-
         /* QEMU needs at least all unique node pair distances to build
          * the whole NUMA distance table. QEMU treats the distance table
          * as symmetric by default, i.e. distance A->B == distance B->A.
@@ -522,8 +430,6 @@ void parse_numa_opts(MachineState *ms)
             /* Validation succeeded, now fill in any missing distances. */
             complete_init_numa_distance();
         }
-    } else {
-        numa_set_mem_node_id(0, ram_size, 0);
     }
 }