diff options
| author | Bin Meng <bin.meng@windriver.com> | 2020-10-28 13:30:06 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-11-03 07:17:23 -0800 |
| commit | 0f25065cb616f74729383fbf30369c374305ebb1 (patch) | |
| tree | bd068b95daa705a154638e7932bdebf16462639c /python/qemu/console_socket.py | |
| parent | e35d617919a76b92af799baa483c4ff0e7c090e3 (diff) | |
| download | focaccia-qemu-0f25065cb616f74729383fbf30369c374305ebb1.tar.gz focaccia-qemu-0f25065cb616f74729383fbf30369c374305ebb1.zip | |
hw/misc: Add Microchip PolarFire SoC SYSREG module support
This creates a minimum model for Microchip PolarFire SoC SYSREG module. It only implements the ENVM_CR register to tell guest software that eNVM is running at the configured divider rate. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/qemu/console_socket.py')
0 files changed, 0 insertions, 0 deletions