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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-10-12 11:57:50 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-10-17 11:13:15 +0200
commit8dadffc01700f79fd66db972fff3a93a594715ee (patch)
treedb238390da1d3207854d153ca5c016ec819e0caa /python/qemu/console_socket.py
parent62f8f2603da7fbcc481489d2903558001a896cad (diff)
downloadfocaccia-qemu-8dadffc01700f79fd66db972fff3a93a594715ee.tar.gz
focaccia-qemu-8dadffc01700f79fd66db972fff3a93a594715ee.zip
target/mips/cp0_timer: Document TIMER_PERIOD origin
TIMER_PERIOD value of '10 ns' can be explained looking at
commit 6af0bf9c7c3doc, where the CPU frequency is 200 MHz
and CP0 default count rate is half the frequency of the
CPU. Document that.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201012095804.3335117-8-f4bug@amsat.org>
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