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| author | Bin Meng <bin.meng@windriver.com> | 2020-10-28 13:30:05 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-11-03 07:17:23 -0800 |
| commit | e35d617919a76b92af799baa483c4ff0e7c090e3 (patch) | |
| tree | fc1c5ad91e365d55bad530875dec4f2c3dbacdbc /python/qemu/machine.py | |
| parent | a937b302831f12094437cdbdfc859bff9f093525 (diff) | |
| download | focaccia-qemu-e35d617919a76b92af799baa483c4ff0e7c090e3.tar.gz focaccia-qemu-e35d617919a76b92af799baa483c4ff0e7c090e3.zip | |
hw/riscv: microchip_pfsoc: Connect the IOSCB module
Previously IOSCB_CFG was created as an unimplemented device. With the new IOSCB model, its memory range is already covered by the IOSCB hence remove the previous unimplemented device creation in the SoC codes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-6-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/qemu/machine.py')
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