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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-10-19 10:23:08 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-11-02 14:32:32 +0100 |
| commit | adcff99a6b41c029841aee30582606e6ae196507 (patch) | |
| tree | cf295ca956f605887a28eba8523a46537d049a2c /python/qemu/machine/machine.py | |
| parent | 675bf34a6fe9db202edd49755c8c586764f5eabf (diff) | |
| download | focaccia-qemu-adcff99a6b41c029841aee30582606e6ae196507.tar.gz focaccia-qemu-adcff99a6b41c029841aee30582606e6ae196507.zip | |
target/mips: Convert MSA 2R instruction format to decodetree
Convert 2-register operations to decodetree. Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211028210843.2120802-17-f4bug@amsat.org>
Diffstat (limited to 'python/qemu/machine/machine.py')
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