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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-05-03 16:47:52 -0700 |
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| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-04 11:50:11 -0700 |
| commit | 000cf4777aadda69d14a6994ca0d195a36733cbd (patch) | |
| tree | a01d2bbc4dbf2ac318f9754d18b2ae05d8c14a2f /python/qemu/utils/accel.py | |
| parent | a4fbbd779a29b912299bc2830f0157513080ddb7 (diff) | |
| download | focaccia-qemu-000cf4777aadda69d14a6994ca0d195a36733cbd.tar.gz focaccia-qemu-000cf4777aadda69d14a6994ca0d195a36733cbd.zip | |
tcg/arm: Add host vector framework
Add registers and function stubs. The functionality is disabled via use_neon_instructions defined to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'python/qemu/utils/accel.py')
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