diff options
| author | Paolo Bonzini <pbonzini@redhat.com> | 2021-06-01 15:31:38 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-06-04 13:47:08 +0200 |
| commit | 28f6aa1178581c3647819e1abc4905899d97d3a2 (patch) | |
| tree | 8ec87f28c83963d62b524ffb2bd1426127c9e813 /python/qemu/utils/accel.py | |
| parent | 29c3d213f4ad69688638330728cff1a8769d7415 (diff) | |
| download | focaccia-qemu-28f6aa1178581c3647819e1abc4905899d97d3a2.tar.gz focaccia-qemu-28f6aa1178581c3647819e1abc4905899d97d3a2.zip | |
target/i386: tcg: fix segment register offsets for 16-bit TSS
The TSS offsets in the manuals have only 2-byte slots for the segment registers. QEMU incorrectly uses 4-byte slots, so that SS overlaps the LDT selector. Resolves: #382 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python/qemu/utils/accel.py')
0 files changed, 0 insertions, 0 deletions