diff options
| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-01-12 11:28:27 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-01-12 11:28:27 +0100 |
| commit | 2e89484821883457cc76a576cf398a7efde4e052 (patch) | |
| tree | a054889ba2fd5edd9e7e5584f912d94928d1de37 /python/qemu/utils/accel.py | |
| parent | 516fc1036b06a48042de1309c4e76abda255cf7b (diff) | |
| download | focaccia-qemu-2e89484821883457cc76a576cf398a7efde4e052.tar.gz focaccia-qemu-2e89484821883457cc76a576cf398a7efde4e052.zip | |
target/ppc: Add MSR_ILE support to ppc_interrupts_little_endian
Some CPUs set ILE via an MSR bit. We can make ppc_interrupts_little_endian handle that case as well. Now we have a centralized way of determining the endianness of interrupts. This change has no functional impact. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20220107222601.4101511-6-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'python/qemu/utils/accel.py')
0 files changed, 0 insertions, 0 deletions