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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-17 13:16:05 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-06-21 17:12:51 +0100 |
| commit | 38548747335a0796ab1d636c8b5bcf5c248ce437 (patch) | |
| tree | 0c8ff3a04b8ee554e30d97cf6aa32e9eec82494f /python/qemu/utils/accel.py | |
| parent | 181cd97143629a304f75acf894ca79b26bf32378 (diff) | |
| download | focaccia-qemu-38548747335a0796ab1d636c8b5bcf5c248ce437.tar.gz focaccia-qemu-38548747335a0796ab1d636c8b5bcf5c248ce437.zip | |
target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
Implement the MVE VRMLALDAVH and VRMLSLDAVH insns, which accumulate the results of a rounded multiply of pairs of elements into a 72-bit accumulator, returning the top 64 bits in a pair of general purpose registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210617121628.20116-22-peter.maydell@linaro.org
Diffstat (limited to 'python/qemu/utils/accel.py')
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